參數(shù)資料
型號(hào)： TISP61521D-S
廠(chǎng)商： BOURNS INC
元件分類(lèi)： 保護(hù)電路
英文描述： DUAL FORWARD-CONDUCTING P-GATE THYRISTORS PROGRAMMABLE OVERVOLTAGE PROTECTORS
中文描述： TELECOM, SURGE PROTECTION CIRCUIT, PDSO8
封裝： ROHS COMPLIANT, PLASTIC, SOP-8
文件頁(yè)數(shù)： 3/11頁(yè)
文件大?。?/td> 191K
代理商： TISP61521D-S
APRIL 2001 REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
Electrical Characteristics, TJ = 25
°
C (Unless Otherwise Noted)
TISP61521 SLIC Protector
Recommended Operating Conditions
Component
Min
Typ
Max
Unit
C1
Gate decoupling capacitor
100
220
nF
R
S
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level surge survival
25
series resistor for GR-1089-CORE, 2/10, 10/360 and 10/1000 first-level and 2/10 second-level
surge survival
40
series resistor for K.20, K.21 and K.45 coordination with a 400 V primary protector
10
series resistor for K.44 4 kV 10/700 surge survival
60
series resistor for FCC Part 68 Type A 10/160 and 10/560 surge survival
20
series resistor for FCC Part 68 Type B 9/720 surge survival
0
series resistor for VDE 0433 2 kV 10/700 surge survival
10
series resistor for VDE 0878 2 kV 1.2/50 surge survival
0
series resistor for IEC 6100-4-5 4 kV, 10/700, class 5, long distance balanced circuits surge
survival with a 400 V primary protector
10
series resistor for IEC 6100-4-5 1.2/50-8/20 combination generator, classes 0 to 5 (500 V to
4 kV maximum), short distance balanced circuits surge survival.
0
Parameter
Test Conditions
Min
Typ
Max
Unit
I
D
Off-state current
V
D
= V
DRM
, V
GK
= 0
T
J
= 25
°
C
T
J
= 85
°
C
-5
μ
A
μ
A
-50
V
GK(BO)
Gate-cathode impulse
breakover voltage
V
GG
= -48 V, C
G
= 220 nF
10/700, I
TM
= -30 A, R
S
= 10
1.2/50, I
TM
= -30 A, R
S
= 10
2/10, I
TM
= -38 A, R
S
= 62
,
I
F
= 5 A, t
w
= 500
μ
s
10/700, I
F
= 30 A, R
S
= 10
1.2/50, I
F
= 30 A, R
S
= 10
2/10, I
F
= 38 A, R
S
= 62
,
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -100 V
7
10
25
V
V
F
Forward voltage
2
V
V
FRM
Peak forward recovery
voltage
5
7
12
V
I
H
Holding current
-150
mA
I
GKS
Gate reverse current
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
T
J
= 25
°
C
T
J
= 85
°
C
-5
μ
A
μ
A
mA
-50
I
GT
Gate trigger current
I
T
= -3 A, t
p(g)
≥
20
μ
s, V
GG
= -100 V
3.0
V
GT
Gate-cathode trigger
voltage
I
T
= -3 A, t
p(g)
≥
20
μ
s, V
GG
= -100 V
2.0
V
C
KA
Cathode-anode off-
state capacitance
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 4)
V
D
= -3 V
V
D
= -48 V
100
pF
50
pF
NOTE 4: These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
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