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參數(shù)資料
| 型號： | TISP6NTP2CD-S |
| 廠商： | BOURNS INC |
| 元件分類： | 保護電路 |
| 英文描述： | High Voltage Ringing SLIC Protector |
| 中文描述： | TELECOM, SURGE PROTECTION CIRCUIT, PDSO8 |
| 封裝： | ROHS COMPLIANT, SOP-8 |
| 文件頁數(shù)： | 3/9頁 |
| 文件大小： | 281K |
| 代理商： | TISP6NTP2CD-S |
MARCH 2002 – REVISED FEBRUARY 2005
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP6NTP2C High Voltage Ringing SLIC Protector
Electrical Characteristics, 0
°
C
≤
TJ
≤
70
°
C (Unless Otherwise Noted)
Parameter
Thermal Characteristics
Test Conditions
Min
Typ
Max
Unit
I
D
Off-state current
V
D
= V
DRM
, V
GK
= 0
T
J
= 25
°
C
-5
μ
A
-50
μ
A
V
(BO)
Ramp breakover
voltage
UL 497B, dv/dt
≤
±
100 V/
μ
s, di/dt =
±
10 A/
μ
s,
V
GG
= -100 V, Maximum ramp value =
±
10 A
2/10
μ
s, I
TM
= -27 A, di/dt = -27 A/
μ
s, R
S
= 50
, V
GG
= -100 V,
(see Note 3)
T
J
= 25
°
C
-112
V
V
(BO)
Impulse breakover
voltage
-115
V
V
GK(BO)
Gate-cathode impulse
breakover voltage
2/10
μ
s, I
TM
= -27 A, di/dt = -27 A/
μ
s, R
S
= 50
, V
GG
= -100 V,
(see Note 3)
15
V
V
F
Forward voltage
I
F
= 5 A, t
w
= 200
μ
s
UL 497B, dv/dt
≤
±
100 V/
μ
s, di/dt =
±
10 A/
μ
s,
Maximum ramp value =
±
10 A
3
V
V
FRM
Ramp peak forward
recovery voltage
T
J
= 25
°
C
5
V
V
FRM
Impulse peak forward
recovery voltage
2/10
μ
s, I
TM
= -27 A, di/dt = -27 A/
μ
s, R
S
= 50
,
(see Note 3)
12
V
I
H
Holding current
I
T
= -1 A, di/dt = 1A/ms, V
GG
= -100 V
-150
mA
I
GKS
Gate reverse current
V
GG
= V
GK
= V
GKRM
, V
KA
= 0
T
J
= 25
°
C
-5
μ
A
-50
μ
A
I
GT
Gate trigger current
I
T
= -3 A, t
p(g)
≥
20
μ
s, V
GG
= -100 V
T
J
= 25
°
C
5
mA
6
mA
V
GT
Gate-cathode trigger
voltage
I
T
= -3 A, t
p(g)
≥
20
μ
s, V
GG
= -100 V
2.5
V
C
KA
Cathode-anode off-
state capacitance
f = 1 MHz, V
d
= 1 V, I
G
= 0, (see Note 4)
V
D
= -3 V
V
D
= -48 V
100
pF
50
pF
NOTES: 3. GR-1089-CORE intra-building 2/10, 1.5 kV conditions with 20 MHz bandwidth. The diode forward recovery and the thyristor gate
impulse breakover (overshoot) are not strongly dependent of the SLIC supply voltage value (V
GG
).
4. These capacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The unmeasured
device terminals are a.c. connected to the guard terminal of the bridge.
Parameter
Test Conditions
Min
Typ
Max
Unit
R
θ
JA
Junction to free air thermal resistance
T
A
= 70
°
C, EIA/JESD51-3 PCB,
EIA/JESD51-2 environment, P
tot
= 0.52 W
160
°
C/W
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