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參數(shù)資料
| 型號： | TJA1041A |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 標準邏輯 |
| 英文描述： | High speed CAN transceiver |
| 中文描述： | 高速CAN收發(fā)器 |
| 文件頁數(shù)： | 9/24頁 |
| 文件大?。?/td> | 138K |
| 代理商： | TJA1041A |
2004 Feb 20
9
Philips Semiconductors
Product specification
High speed CAN transceiver
TJA1041A
UV
NOM
FLAG
UV
NOM
is the V
CC
and V
I/O
undervoltage detection flag.
The flag is set when the voltage on pin V
CC
drops below
V
CC(sleep)
for longer than t
UV(VCC)
or when the voltage on
pin V
I/O
drops below V
I/O(sleep)
for longer than t
UV(VI/O)
.
When the UV
NOM
flag is set, the transceiver will enter
sleepmodetosavepowerandnotdisturbthebus.In sleep
mode the voltage regulators connected to pin INH are
disabled, avoiding the extra power consumption in case of
a short-circuit condition. After a waiting time (fixed by the
same timers used for setting UV
NOM
) any wake-up request
or setting of the pwon flag will clear UV
NOM
and the timers,
allowing the voltage regulators to be reactivated at least
until UV
NOM
is set again.
UV
BAT
FLAG
UV
BAT
is the V
BAT
undervoltage detection flag. The flag is
set when the voltage on pin V
BAT
drops below V
BAT(stb)
.
When UV
BAT
is set, the transceiver will try to enter standby
mode to save power and not disturb the bus. UV
BAT
is
cleared when the voltage on pin V
BAT
has recovered. The
transceiver will then return to the operating mode
determined by the logic state of pins STB and EN.
P
WON FLAG
Pwon is the V
BAT
power-on flag. This flag is set when the
voltage on pin V
BAT
has recovered after it dropped below
V
BAT(pwon)
, particularly after the transceiver was
disconnected from the battery. By setting the pwon flag,
the UV
NOM
flag and timers are cleared and the transceiver
cannot enter sleep mode. This ensures that any voltage
regulator connected to pin INH is activated when the node
is reconnected to the battery. In pwon/listen-only mode the
pwon flag can be made available on pin ERR. The flag is
cleared when the transceiver enters normal mode.
W
AKE
-
UP FLAG
The wake-up flag is set when the transceiver detects a
local or a remote wake-up request. A local wake-up
request is detected when a logic state change on
pin WAKE remains stable for at least t
wake
. A remote
wake-up request is detected after two bus dominant states
of at least t
BUSdom
(with each dominant state followed by a
recessive state of at least t
BUSrec
). The wake-up flag can
only be set in standby mode, go-to-sleep command mode
or sleep mode. Setting of the flag is blocked during the
UV
NOM
flag waiting time. By setting the wake-up flag, the
UV
NOM
flag and timers are cleared. The wake-up flag is
immediately available on pins ERR and RXD (provided
that V
I/O
and V
CC
are present). The flag is cleared at
power-on, or when the UV
NOM
flag is set or the transceiver
enters normal mode.
W
AKE
-
UP SOURCE FLAG
Wake-up source recognition is provided via the wake-up
source flag, which is set when the wake-up flag is set by a
local wake-up request via pin WAKE. The wake-up source
flag can only be set after the pwon flag is cleared.
In normal mode the wake-up source flag can be made
available on pin ERR. The flag is cleared at power-on or
when the transceiver leaves normal mode.
B
US FAILURE FLAG
The bus failure flag is set if the transceiver detects a bus
line short-circuit condition to V
BAT
, V
CC
or GND during four
consecutive dominant-recessive cycles on pin TXD, when
trying to drive the bus lines dominant. In normal mode the
bus failure flag can be made available on pin ERR. The
flag is cleared when the transceiver re-enters normal
mode.
L
OCAL FAILURE FLAG
In normal mode or pwon/listen-only mode the transceiver
can recognize five different local failures, and will combine
them into one local failure flag. The five local failures are:
TXD dominant clamping, RXD recessive clamping, a
TXD-to-RXD short circuit, bus dominant clamping, and
over-temperature. Nature and detection of these local
failures is described in Section “Local failures”.
In pwon/listen-onlymodethelocalfailureflagcanbemade
available on pin ERR. The flag is cleared when entering
normal mode or when RXD is dominant while TXD is
recessive, provided that all local failures are resolved.
Local failures
The TJA1041A can detect five different local failure
conditions. Any of these failures will set the local failure
flag, and in most cases the transmitter of the transceiver
will be disabled. The following sections give the details.
TXD
DOMINANT CLAMPING DETECTION
A permanent LOW level on pin TXD (due to a hardware or
software application failure) would drive the CAN bus into
a permanent dominant state, blocking all network
communication. The TXD dominant time-out function
prevents such a network lock-up by disabling the
transmitter of the transceiver if pin TXD remains at a LOW
level for longer than the TXD dominant time-out t
dom(TXD)
.
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| TJA1041AT | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC CAN CONTROLLER INTERFACE RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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