- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄361500 > TK75020 (TOKO INC) ZVS RESONANT CONTROLLER PDF資料下載
參數(shù)資料
| 型號(hào)： | TK75020 |
| 廠商： | TOKO INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | ZVS RESONANT CONTROLLER |
| 中文描述： | FLUORESCENT LIGHT CONTROLLER, 165 kHz SWITCHING FREQ-MAX, PDSO14 |
| 封裝： | SOP-14 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 87K |
| 代理商： | TK75020 |
Page 6
January 1999 TOKO, Inc.
TK75020
PIN DESCRIPTION
SUPPLY VOLTAGE PIN (V
CC
)
This pin is connected to the supply voltage. The IC begins
normal operation when two conditions are met: 1) the V
CC
voltage exceeds 5.6 V and 2) the voltage of the enable pin
exceeds 2.2 V. Operation ceases and the IC goes into a
UVLO mode when the V
CC
voltage drops below 5.3 V.
When the voltage at the enable pin becomes less than
0.4 V, the IC is turned off (“off” mode). In UVLO mode the
current consumption is less than 300
μ
A, in off mode it is
further reduced to below 3
μ
A. The operating voltage
range is 6 V to 14 V. The tolerances of the start and stop
voltages are 5.6
±
0.4 V and 5.3
±
0.3 V, respectively.
During normal operation the total IC current consumption
is less than 8 mA (no load, 100 kHz operation).
When V
CC
is applied to the device with the enable pin
pulled above 2.2 V (“on” mode), the following events will
occur:
First, a trimmed bandgap reference voltage will be
generated as soon as V
CC
reaches about 4.8 V. This
reference will be used to determine the UVLO thresholds.
When V
CC
reaches the upper threshold of the undervoltage
lockout comparator, that comparator enables the reference
buffer. When the voltage at the output of the buffer, i.e. on
the V
REF
pin, becomes higher than about 3.7 V, an enable
signal is generated for the drive stage through gate G
3
.
Normal operation may be interrupted at any time by pulling
the enable pin below 0.4 V. When V
CC
is reduced below the
lower threshold of the undervoltage lockout, the internal 4
V bias is disabled and the drive output is quickly turned off.
The bandgap reference remains active as long as V
CC
is
above 4.8 V. Special care has been taken to keep the drive
output low even at a lower level of V
CC
in order to prevent
unwanted turn-on of the external MOSFET.
ENABLE (ON/OFF) PIN (EN)
The enable pin is used to enable or disable the IC. The IC
is guaranteed to turn on (i.e., to enter the “on” mode) when
the pin voltage is above 2.2 V and is guaranteed to turn off
when the pin voltage is below 0.4 V. If the On/Off feature
is not needed, the pin can be connected directly to the
supply voltage. The enable pin is internally equivalent to a
200 k
resistor in series with two diodes.
GROUND PIN (GND)
This pin provides ground return connection for the IC.
DRIVE PIN (DRV)
This pin drives the external MOSFET. During standby, the
DRV pin provides at least 20 mA current sinking capability
with less than 1 V difference between the ground and the
DRV pin. The internal circuitry connected to the DRV pin
is designed to deliver a peak output voltage of 4 V above
ground when the device operates at a minimum supply
voltage of 6 V. An internal clamp circuit, however, ensures
that the peak output voltage will never exceed 13 V. The
DRV pin goes high only if the following five conditions are
met simultaneously: 1) the drive (DRV) latch is set, 2) the
overdissipation protection latch (ODP) is reset, 3) the
current limit latch (C
L
) is reset, 4) the enable pin is pulled
high, and 5) the output of the reference comparator is high,
i.e., it detects that the voltage at the V
ref
pin is sufficiently
high.
CURRENT LIMIT PIN (C
L
)
The C
L
pin is used for high-speed, cycle-by-cycle overload
protection. When the voltage of the C
L
pin exceeds 0.2 V
above ground, the current limit latch is set by the C
L
comparator and the output stage is forced low. At the same
time, the timing capacitor is quickly discharged with
transistor Q
16
. Note that a quick discharge is necessary in
order to reduce the “on” time (and the duty ratio) without a
significant increase in the effective “off” time. The current
limit latch is reset when the output of the drive latch goes
low, i.e., when the off time is over and the output of the C
L
comparator goes high.
REFERENCE PIN (V
ref
)
The bandgap reference, an internal 4 V source, is buffered
by a reference buffer, whose output is connected to the V
ref
pin. The V
ref
pin voltage is enabled to develop when the
upper threshold of the UVLO comparator is passed by V
CC
.
TIMING CAPACITOR PIN (C
T
)
The external timing capacitor is connected to the C
T
pin.
The voltage across the timing capacitor oscillates between
an upper level of 3 V and a lower level of 1 V. During the
time the voltage of the timing capacitor is rising (due to the
charging current set by the resistor between ground and
the T
OFF( MAX)
pin), the drive latch is in the reset state and
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TK75020TL | ZVS RESONANT CONTROLLER |
| TK75050 | SMART MOSFET DRIVER |
| TK75050D | SMART MOSFET DRIVER |
| TK75050DITL | SMART MOSFET DRIVER |
| TK83361M | NARROW BAND FM IF IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TK75020TL | 制造商:TOKO 制造商全稱:TOKO, Inc 功能描述:ZVS RESONANT CONTROLLER |
| TK75020TL/75020 | 制造商:TOKO 制造商全稱:TOKO, Inc 功能描述:ZVS RESONANT CONTROLLER |
| TK75050 | 制造商:TOKO 制造商全稱:TOKO, Inc 功能描述:SMART MOSFET DRIVER |
| TK75050D | 制造商:TOKO 制造商全稱:TOKO, Inc 功能描述:SMART MOSFET DRIVER |
| TK75050DITL | 制造商:TOKO 制造商全稱:TOKO, Inc 功能描述:SMART MOSFET DRIVER |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。