參數(shù)資料
型號(hào)： TLC2543IDBLE
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝： PLASTIC, SSOP-20
文件頁(yè)數(shù)： 10/32頁(yè)
文件大?。?/td> 804K
代理商： TLC2543IDBLE
TLC2543C, TLC2543I, TLC2543M
12-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SLAS079F – DECEMBER 1993 – REVISED NOVEMBER 2001
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
analog input, test, and power-down mode
The 11 analog inputs, three internal voltages, and power-down mode are selected by the input multiplexer
according to the input addresses shown in Tables 2, 3, and 4. The input multiplexer is a break-before-make type
to reduce input-to-input noise rejection resulting from channel switching. Sampling of the analog input starts on
the falling edge of the fourth I/O CLOCK and continues for the remaining I/O CLOCK pulses. The sample is held
on the falling edge of the last I/O CLOCK pulse. The three internal test inputs are applied to the multiplexer, then
sampled and converted in the same manner as the external analog inputs. The first conversion after the device
has returned from the power-down state may not read accurately due to internal device settling.
Table 3. Analog-Channel-Select Address
ANALOG INPUT
SELECTED
VALUE SHIFTED INTO
DATA INPUT
SELECTED
BINARY
HEX
AIN0
0000
0
AIN1
0001
1
AIN2
0010
2
AIN3
0011
3
AIN4
0100
4
AIN5
0101
5
AIN6
0110
6
AIN7
0111
7
AIN8
1000
8
AIN9
1001
9
AIN10
1010
A
Table 4. Test-Mode-Select Address
INTERNAL
SELF-TEST
VOLTAGE
VALUE SHIFTED INTO
DATA INPUT
UNIPOLAR OUTPUT
RESULT (HEX)
VOLTAGE
SELECTED
BINARY
HEX
RESULT (HEX)
Vref + – Vref –
2
1011
B
800
Vref –
1100
C
000
Vref +
1101
D
FFF
Vref+ is the voltage applied to REF+, and Vref– is the voltage applied to REF–.
The output results shown are the ideal values and may vary with the reference stability
and with internal offsets.
Table 5. Power-Down-Select Address
INPUT COMMAND
VALUE SHIFTED INTO
DATA INPUT
RESULT
BINARY
HEX
Power down
1110
E
ICC ≤ 25 A
相關(guān)PDF資料
PDF描述
TLC2543IDBRG4Q1 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLC2543IDBRQ1 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
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