參數(shù)資料
型號: TLC2543IDW
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝: GREEN, PLASTIC, SOIC-20
文件頁數(shù): 6/32頁
文件大?。?/td> 804K
代理商: TLC2543IDW
TLC2543C, TLC2543I, TLC2543M
12-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL AND 11 ANALOG INPUTS
SLAS079F – DECEMBER 1993 – REVISED NOVEMBER 2001
14
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
data input
The data input is internally connected to an 8-bit serial-input address and control register. The register defines
the operation of the converter and the output data length. The host provides the data word with the MSB first.
Each data bit is clocked in on the rising edge of the I/O CLOCK sequence (see Table 2 for the data input-register
format).
Table 2. Input-Register Format
INPUT DATA BYTE
FUNCTION SELECT
ADDRESS BITS
L1
L0
LSBF
BIP
FUNCTION SELECT
D7
(MSB)
D6
D5
D4
D3
D2
D1
D0
(LSB)
Select input channel
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
AIN9
AIN10
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Select test voltage
(Vref + – Vref –)/2
Vref –
Vref +
1
0
1
0
1
0
1
Software power down
1
11
0
Output data length
8 bits
12 bits
16 bits
0
X
1
0
1
Output data format
MSB first
LSB first (LSBF)
0
1
Unipolar (binary)
0
Bipolar (BIP) 2s complement
1
X represents a do not care condition.
data input address bits
The four MSBs (D7 – D4) of the data register address one of the 11 input channels, a reference-test voltage,
or the power-down mode. The address bits affect the current conversion, which is the conversion that
immediately follows the current I/O cycle. The reference voltage is nominally equal to Vref+ – Vref–.
相關(guān)PDF資料
PDF描述
TLC2543MJ 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, CDIP20
TLC2543CDBG4 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLC2543CDBRG4 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLC2543CDWG4 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
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