參數(shù)資料
型號(hào)： TLC32046I
廠商： Texas Instruments, Inc.
英文描述： Wide-Band Analog Interface Circuit
中文描述： 寬帶模擬接口電路
文件頁(yè)數(shù)： 40/57頁(yè)
文件大?。?/td> 297K
代理商： TLC32046I
4–2
DATA-DR
DX
DR
FSX, FSR, FSD
td (CH-DR)
D12
tsu (DX)
D15
D14
D13
D12
D2
D1
D0
Don’t Care
D0
D1
D2
D11
D12
D13
D14
D15
D0
D1
D2
D11
D13
D14
D15
8 V
2 V
2 V
8 V
2 V
2 V
8 V
td (CH-FL)
td (CH-FH)
tc (SCLK)
D11
2 V
SHIFT
CLK
Figure 4–2. Dual-Word (Telephone Interface) Mode Timing
DX
DR
FSX, FSR
td (CH–DR)
D12
tsu (DX)
Don’t Care
D0
D1
D2
D11
D12
D13
D14
D15
D0
D1
D2
D11
D13
D14
D15
8 V
2 V
2 V
8 V
2 V
2 V
8 V
td (CH-FL)
td (CH-FH)
tc (SCLK)
2 V
SHIFT
CLK
8 V
2 V
th (DX)
td (CH-EL)
td (CH-EH)
EODX, EODR
Figure 4–3. Word Timing
The time between falling edges of FSR is the A/D conversion period and the time between falling edges of FSX is the
D/A conversion period.
In the word format, EODX and EODR go low to signal the end of a 16-bit data word to the processor. The word-cycle
is 20 shift-clocks wide, giving a four-clock period setup time between data words.
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參數(shù)描述
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TLC32046M 制造商:TI 制造商全稱:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit
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TLC32047CFN 制造商:TI 制造商全稱:Texas Instruments 功能描述:Wide-Band Analog Interface Circuit
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