參數(shù)資料
型號(hào): TLC5617CDR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 12.5 us SETTLING TIME, 10-BIT DAC, PDSO8
封裝: PLASTIC, SO-8
文件頁(yè)數(shù): 8/21頁(yè)
文件大?。?/td> 307K
代理商: TLC5617CDR
TLC5617, TLC5617A
PROGRAMMABLE DUAL 10-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS151B – JULY 1997 – REVISED MARCH 2000
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
DSP serial interface
Utilizing a simple 3-wire serial interface, the TLC5617A can be interfaced to TMS320 compatible serial ports.
The 5617A has an internal state machine that counts 16 clocks after receiving a falling edge of CS and then
disable further clocking in of data until the next falling edge is received on CS. Therefore the CS can be
connected directly to the FS pins of the serial port and only the leading falling edge of the DSP will be used to
start the write process. The TLC5617A is designed to be used with the TMS320Cxx DSP in burst mode serial
port transmit operation.
SCLK
DIN
CS
TLC5617
CLKX
DX
FSX
TMS320C32
DSP
VCC
OUT A
OUT B
GND
REFIN
2.5 V dc
FSR
To Source
Ground
Analog
Output
Analog
Output
CLKR
Figure 22. Interfacing The TLC5617 To TMS320C32 DSP
SPI serial interface
Both the TLC5617 and TLC5617A are compatible with SPI, QSPI, or Microwire serial standards. The hardware
connections are shown in Figure 23 and Figure 24. The TLC5617A has an internal state machine that counts
16 clocks after the falling edge of CS and then internally disables the device. The internal edge is ORed together
with CS so that the rising edge can be provided to CS prior to the occurrence of the internal edge to also disable
the device.
general serial interface
The TLC5617 3-wire interface is compatible with the SPI, QSPI, and Microwire serial standards. The hardware
connections are shown in Figure 23 and Figure 24.
The SPI and Microwire interfaces transfer data in 8-bit bytes, therefore, two write cycles are required to input
data to the DAC. The QSPI interface, which has a variable input data length from 8 to 16 bits, can load the DAC
input register in one write cycle.
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