參數(shù)資料
型號(hào)： TLC5628IDWR
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： DAC
英文描述： OCTAL, SERIAL INPUT LOADING, 10 us SETTLING TIME, 8-BIT DAC, PDSO16
文件頁(yè)數(shù)： 12/17頁(yè)
文件大?。?/td> 407K
代理商： TLC5628IDWR
TLC5628C, TLC5628I
OCTAL 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS089E – NOVEMBER 1994 – REVISED APRIL 1997
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
data interface (continued)
CLK
DATA
LOAD
LDAC
DAC Update
A2
A1
A0
RNG
D7
D6
D5
D4
D2
D1
D0
tsu(DATA-CLK)
tv(DATA-CLK)
tw(LDAC)
tsu(LOAD – LDAC)
Figure 2. LDAC-Controlled Update
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
CLK
DATA
LOAD
LDAC
CLK Low
A2
Figure 3. Load-Controlled Update Using 8-Bit Serial Word (LDAC = Low)
A1
A0
RNG
D7
D6
D5
D4
D3
D2
D1
D0
CLK
DATA
LOAD
LDAC
CLK Low
A2
Figure 4. LDAC-Controlled Update Using 8-Bit Serial Word
Table 2 lists the A2, A1, and A0 bits and the selection of the updated DACs. The RNG bit controls the DAC output
range. When RNG = low, the output range is between the applied reference voltage and GND, and when
RNG = high, the range is between twice the applied reference voltage and GND.
Table 2. Serial Input Decode
A2
A1
A0
DAC UPDATED
0
DACA
0
1
DACB
0
1
0
DACC
0
1
DACD
1
0
DACE
1
0
1
DACF
1
0
DACG
1
DACH
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