參數(shù)資料
型號: TLC7225IDW
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24
封裝: 0.300 INCH, GREEN, SOIC-24
文件頁數(shù): 19/22頁
文件大小: 331K
代理商: TLC7225IDW
TLC7225C, TLC7225I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001
6
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
operating characteristics over recommended operating free-air temperature range
dual power supply over recommended supply and reference voltage ranges, AGND = DGND = 0 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Slew rate
2.5
V/
s
t
Settling time to 1/2 LSB
Positive full scale
V f(ABCD) =10V
5
s
ts
Settling time to 1/2 LSB
Negative full scale
Vref(A, B, C, D) = 10 V
7
s
Resolution
8
Bits
Total unadjusted error
VDD = 15 V ± 5%,
Vref(A, B, C, D) = 10 V
±2
LSB
Integral nonlinearity (INL)
VDD = 15 V ± 5%,
Vref(A, B, C, D) = 10 V
±1
LSB
Differential nonlinearity (DNL)
VDD = 15 V ± 5%,
Vref(A, B, C, D) = 10 V
±1
LSB
EFS
Full-scale error
VDD = 15 V ± 5%,
Vref(A, B, C, D) = 10 V
±2
LSB
EG
Gain error
VDD = 15 V ± 5%,
Vref(A, B, C, D) = 10 V
±0.25
LSB
Temperature coefficient
Full-scale error
VDD =14Vto16 5 V
V f(ABCD) =10V
±20
ppm/
°C
of gain
Zero-code error
VDD = 14 V to 16.5 V, Vref(A, B, C, D) = 10 V
±50
V/°C
Zero-code error
±20
±80
mV
Digital crosstalk or feedthrough glitch
impulse area
Vref(A, B, C, D) = 0
50
nV– s
single power supply, VDD = 14.25 V to 15.75 V, VSS = AGND = DGND = 0 V, Vref(A, B, C, D) = 10 V (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Slew rate
2
V/
s
t
Settling time to 1/2 LSB
Positive full scale
5
s
ts
Settling time to 1/2 LSB
Negative full scale
20
s
Resolution
8
Bits
Total unadjusted error
±2
LSB
EFS
Full-scale error
±2
LSB
Temperature coefficient of gain
Full-scale error
VDD = 14 V to 16.5 V,
Vref(A, B, C, D) = 10 V
±20
ppm/
°C
g
Zero-code error
±50
V/°C
Differential nonlinearity error (DNL)
±1
LSB
Digital crosstalk or feedthrough glitch impulse area
50
nV– s
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