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參數(shù)資料
| 型號： | TLC7225IDWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 8-BIT DAC, PDSO24 |
| 封裝： | 0.300 INCH, GREEN, SOIC-24 |
| 文件頁數(shù)： | 7/22頁 |
| 文件大?。?/td> | 331K |
| 代理商： | TLC7225IDWRG4 |
TLC7225C, TLC7225I
QUADRUPLE 8-BIT DIGITAL-TO-ANALOG CONVERTERS
SLAS109B – OCTOBER 1996 – REVISED FEBRUARY 2001
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
bipolar-output operation using external amplifier
Each of the DACs of the TLC7225 can also be individually configured to provide bipolar output operation using
an external amplifier and two resistors per channel. Figure 11 shows a circuit used to implement offset binary
coding (bipolar operation) with DAC A of the TLC7225. In this case (see equation 1):
V
O +
1
) R2
R1
D
A
V
ref *
R2
R1
V
ref
with R1
+ R2
V
O +
2D
A *
1 V
ref
where D
A
is a fractional representation of the digital word in latch A.
(1)
Mismatch between R1 and R2 causes gain and offset errors. Therefore, these resistors must match and track
over temperature. The TLC7225 can be operated with a single supply or from positive and negative supplies.
15 V
_
+
DAC A
TLC7225
2
5
R2
R1
VO
REFA
R1 = R2 = 10 k
±0.1%
_
+
– 15 V
Figure 11. Bipolar-Output Circuit
multiplying DAC using ac input to the REF terminals
The TLC7225 can be used as a multiplying DAC when the reference signal is maintained between 2 V and
VDD – 4 V. When this configuration is used, VDD should be 14.25 V to 15.75 V. A low output-impedance buffer
should be used so that the input signal is not loaded by the resistor ladder. Figure 12 shows the general
schematic.
_
+
_
+
DAC
AGND
DGND
67
1/4 TLC7225
5, 4, 21, 20
15 V
REF (A, B, C, D)
OP - 15
15 V
R1
R2
AC Reference
Input Signal
VO
15 V
VDD
Figure 12. AC Signal-Input Scheme
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