參數(shù)資料
型號(hào): TLC7528CPW
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, TSSOP-20
文件頁(yè)數(shù): 3/25頁(yè)
文件大?。?/td> 631K
代理商: TLC7528CPW
TLC7528C, TLC7528E, TLC7528I
DUAL 8BIT MULTIPLYING
DIGITALTOANALOG CONVERTERS
SLAS062E JANUARY 1987 REVISED NOVEMBER 2008
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
REFB
19
RFBB
OUTB
AGND
TLC7528
REFA
DB0 DB7
CS
WR
DACA / DACB
DGND
Vref
Data Inputs
4
5
18
6
16
15
14 7
Test Input
0 to Vref
RFBA
3
VDD
17
OUTA
2
1
20
PASS / FAIL Output
1 k
VCC
+
+
DACB
DACA
8
Figure 8. Digitally-Programmable Window Comparator (Upper- and Lower-Limit Tester)
digitally-controlled signal attenuator
Figure 9 shows a TLC7528 configured as a two-channel programmable attenuator. Applications include stereo
audio and telephone signal level control. Table 3 shows input codes vs attenuation for a 0dB to 15.5dB range.
Output
A1
A2
VOB
VDD
TLC7528
DGND
AGND
REFB
DACA / DACB
WR
CS
DB0 DB7
OUTA
RFBA
REFA
RFBB
OUTB
Data Bus
3
2
15
16
6
18
1
5
19
17
4
20
DACA
DACB
Attenuation dB = 20 log10 D/256, D = digital input code
8
14 7
VIA
Figure 9. Digitally Controlled Dual Telephone Attenuator
相關(guān)PDF資料
PDF描述
TLC7528CFNG3 PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PQCC20
TLC7528IDW PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC7528CPWG4 PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
TLC7528EFN DUAL, PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PQCC20
TLC7528EPWR DUAL, PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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