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參數(shù)資料
| 型號(hào)： | TLC7628IN |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 12/13頁(yè) |
| 文件大小： | 255K |
| 代理商： | TLC7628IN |
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TLC7628C
DUAL 8BIT MULTIPLYING
SLAS063B APRIL 1989 REVISED MARCH 2007
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
This device contains two, identical, 8-bit, multiplying DACs: DACA and DACB. Each DAC consists of an inverted
R-2R ladder, analog switches, and input data latches. Binary-weighted currents are switched between the DAC
output and AGND, thus maintaining a constant current in each ladder leg independent of the switch state. Most
applications require only the addition of an external operational amplifier and voltage reference. A simplified D/A
circuit for DACA or DACB with all digital inputs low is shown in Figure 7.
Figure 8 shows the DACA or DACB equivalent circuit. Both DACs share the analog ground terminal 1 (AGND).
With all digital inputs high, the reference current flows to OUTA. A small leakage current (IIkg) flows across
internal junctions, and as with most semiconductor devices, doubles every 10
°C. The Co is caused by the
parallel combination of the NMOS switches and has a value that depends on the number of switches connected
to the output. The range of Co is 25 pF to 60 pF maximum. The equivalent output resistance (ro) varies with the
input code from 0.8R to 3R where R is the nominal value of the ladder resistor in the R-2R network.
The TLC7628C interfaces to a microprocessor through the data bus, CS, WR, and DACA/DACB control signals.
When CS and WR are both low, the analog output on this device, specified by the DACA/DACB control line,
responds to the activity on the DB0DB7 data bus inputs. In this mode, the input latches are transparent and
input data directly affects the analog output. When either the CS signal or WR signal goes high, the data on the
DB0DB7 inputs are latched until the CS and WR signals go low again. When CS is high, the data inputs are
disabled, regardless of the state of the WR signal.
The digital inputs of the TLC7628C provides TTL compatibility when operated from a supply voltage of 10.8 V
to 15.75 V.
DACA Data Latches and Drivers
REF
AGND
OUT
RFB
R
2R
S8
2R
S3
2R
S2
S1
2R
Figure 7. Simplified Functional Circuit for DACA or DACB
R
REF
OUTA
RFB
R
COUT
1/256
Latch A or Latch B Loaded With 11111111
Ilkg
AGND
Figure 8. TLC7628 Equivalent Circuit for DACA or DACB
相關(guān)PDF資料 |
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| TLC7628CDWR | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CDWRG4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CNE4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
| TLC7628CDWG4 | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDSO20 |
| TLC7628CN | PARALLEL, 8 BITS INPUT LOADING, 0.1 us SETTLING TIME, 8-BIT DAC, PDIP20 |
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