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參數資料
| 型號： | TLC876IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | SOP-28 |
| 文件頁數： | 8/22頁 |
| 文件大?。?/td> | 340K |
| 代理商： | TLC876IDW |
TLC876M, TLC876I, TLC876C
10-BIT 20 MSPS PARALLEL OUTPUT CMOS
ANALOG-TO-DIGITAL CONVERTERS
SLAS140E – JULY 1997 – REVISED OCTOBER 2000
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PRINCIPLES OF OPERATION
dc considerations (continued)
The REFTS and REFBS terminals should not be connected in configurations that do not use a force-sense
reference. Connecting the force and sense lines together allows current to flow in the sense lines. Any current
allowed to flow through these lines must be negligibly small. Current flow causes voltage drops across the
resistance in the sense lines. Because the internal DACs tap different points along the sense lines, each DAC
would receive a slightly different reference voltage if current were flowing in these lines. To avoid this undesirable
condition, leave the sense lines unconnected. Any current allowed to flow through these lines must be negligibly
small (< 100
A).
The voltage drop across the internal resistor array (RARRAY) determines the input span. The nominal differential
voltage is 2 Vpp. The full-scale input span is given by equation 3.
Input Voltage Span = V(REFTS) – V(REFBS)
(3)
Therefore, a full-scale input span is approximately 2 V when [V(REFTS) – V(REFBS)] = 2 V. The external
reference must provide approximately 4 mA for a 2-V drop across the internal resistor array.
Figure 18 shows the flexibility in determining both the full-scale span of the analog input and where to center
this voltage without degrading the typical performance.
2.5
2
0.5
0
0.5
1
1.5
2
2.5
3
REFTF
,REFTS
3.5
4.5
REFBF, REFBS
5
3.5
4
1.5
4
3
1
2 V Span
1 V Span
Figure 18. TLC876 Reference Ranges
ac considerations
The simplified diagram of Figure 17 shows that the reference terminals connect to a capacitor for one half of
the clock period. The size of the capacitor is a function of the analog input voltage, therefore producing dynamic
impedance changes at the reference inputs.
The external reference source must be able to maintain a low impedance over all frequencies of interest to
provide the charge required by the capacitance. By supplying the requisite charge, the reference voltages
remain relatively constant maintaining specified performance. For some reference configurations, voltage
transients are present on the reference lines, especially during the falling edge of CLK. The reference must
recover from the transients and settle to the desired level of accuracy prior to the rising edges of CLK.
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| TLC876IDWR | 制造商:TI 制造商全稱:Texas Instruments 功能描述:10-BIT 20 MSPS PARALLEL OUTPUT CMOS ANALOG-TO-DIGITAL CONVERTERS |
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