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參數(shù)資料
| 型號： | TLE6210G |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO20 |
| 封裝： | PLASTIC, SO-20 |
| 文件頁數(shù)： | 10/35頁 |
| 文件大?。?/td> | 686K |
| 代理商： | TLE6210G |
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TLE 6210
TLE 6211
Block Description and Electrical Characteristics
V1.2 Data Sheet
18
2002-08
Supervision
The TLE 6210 and TLE 6211 are equipped with a complex supervision logic. The input
voltage and the regulator output voltage is supervised. In addition two
m-controller are
supervised by independent watchdog circuits.
4.9
Overvoltage and Undervoltage
Both the supply voltage
UZP and the output voltage UST are supervised for over- and
undervoltage.
In case any undervoltage or overvoltage condition at
UST or UZP is detected, the reset
outputs RES1 and RES2 are switched to low state. RES1 and RES2 are not controlled
by the watchdog logic.
To supervise the output voltage
UST an independent bandgap from the reference
bandgap is used.
The reset outputs RES1 and RES2 are together controlled by the
UST reset logic and
the supply undervoltage lockout (UVLO) and overvoltage lockout (OVLO).
A logic High at the RES1 and RES2 indicates normal operation. The outputs are open
collector type outputs with integrated pull-up resistors to
UST. Even when the UST
voltage drops, the reset outputs RES1 and RES2 remain low (< 0.4 V).
Both undervoltage and overvoltage detection of
UST and UZP use a voltage hysteresis
to avoid any reset toggling.
Undervoltage and Overvoltage Detection
UST
The
UST output voltage has to be externally connected to the USTS sense input.
To be able to detect also wrong output voltages causes by a malfunction of the related
bandgap reference for supervision an independent bandgap is used.
As soon as any reset condition is detected the RES1 and RES2 go low.
4.9.1
Undervoltage Lockout (UVLO) and Overvoltage Lockout (OVLO)
The supply voltage
UZP is supervised as well. If the voltage rises above the upper
threshold value of 19.5 V reset is asserted. When an undervoltage occurs, after some
time the output voltage will drop below the reset threshold and a reset is asserted. The
undervoltage lockout is only valid during power up.
Both the OVLO and the UVLO threshold use a hysteresis to avoid reset glitches. In
addition the OVLO is digitally filtered. Overvoltage below 2 to 3 clock cycles (equals
typical 2 s or 3 s) are neglected to avoid resetting the system when any inductive load
is switched off.
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相關代理商/技術參數(shù) |
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