TLV0834C, TLV0834I, TLV0838C, TLV0838I
3-VOLT 8-BIT ANALOG-TO-DIGITAL CONVERTERS
WITH SERIAL CONTROL
SLAS147B – SEPTEMBER 1996 – REVISED OCTOBER 2000
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended range of operating free-air temperature, VCC = 3.3 V,
f(CLK) = 250 kHz (unless otherwise noted) (continued)
analog and converter section
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
– 0.05
VIC
Common-mode input voltage
See Note 3
to
V
IC
g
VCC + 0.05
On channel
VI = 3.3 V
1
II( tdb )
Standby input current (see Note 4)
Off channel
VI = 0
–1
A
II(stdby)
Standby input current (see Note 4)
On channel
VI = 0
–1
A
Off channel
VI = 3.3 V
1
ri(REF)
Input resistance to REF
1.3
2.4
5.9
k
total device
PARAMETER
MIN
TYP
MAX
UNIT
ICC
Supply current
0.2
0.75
mA
All parameters are measured under open-loop conditions with zero common-mode input voltage.
All typical values are at VCC = 3.3 V, TA = 25°C.
NOTES:
3. When channel IN – is more positive than channel IN+, the digital output code is 0000 0000. Connected to each analog input are
two on-chip diodes that conduct forward current for analog input voltages one diode drop above VCC. Care must be taken during
testing at low VCC levels (3 V) because high-level analog input voltage (3.6 V) can, especially at high temperatures, cause the input
diode to conduct and cause errors for analog inputs that are near full scale. As long as the analog voltage does not exceed the supply
voltage by more than 50 mV, the output code is correct. To achieve an absolute 0- to 3.3-V input range requires a minimum VCC of
3.25 V for all variations of temperature and load.
4. Standby input currents go in or out of the on or off channels when the A/D converter is not performing conversion and the clock is
in a high or low steady-state condition.
operating characteristics, VCC = 3.3 V, f(CLK) = 250 kHz, tr = tf = 20 ns, TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS§
MIN
TYP
MAX
UNIT
Supply-voltage variation error
VCC = 3 V to 3.6 V
±1/16
±1/4
LSB
Total unadjusted error (see Note 5)
Vref = 3.3 V, TA = MIN to MAX
±1
LSB
Common-mode error
Differential mode
±1/16
±1/4
LSB
t d
Propagation delay time, output data after
MSB-first data
CL = 100pF
500
ns
tpd
gy
,
CLK
↓ (see Note 6)
LSB-first data
CL = 100pF
200
ns
tdi
Output disable time DO or SARS after CS
↑
CL = 10 pF,
RL = 10 k
80
ns
tdis
Output disable time, DO or SARS after CS
↑
CL = 100 pF, RL = 2 k
250
ns
tc
Conversion time (multiplexer-addressing time not included)
8
clock
periods
§ All parameters are measured under open-loop conditions with zero common-mode input voltage. For conditions shown as MIN or MAX, use the
appropriate value specified under recommended operating conditions.
NOTES:
5. Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
6. The MSB-first data is output directly from the comparator and, therefore, requires additional delay to allow for comparator response
time.