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參數(shù)資料
| 型號： | TLV1504IPWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| 封裝： | GREEN, PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 10/46頁 |
| 文件大?。?/td> | 1065K |
| 代理商： | TLV1504IPWRG4 |
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TLV1504, TLV1508
2.7V TO 5.5V, 10BIT, 200KSPS, 4/8CHANNEL, LOW POWER
SERIAL ANALOGTODIGITAL CONVERTERS WITH AUTOPOWERDOWN
SLAS251A DECEMBER 1999 REVISED JANUARY 2003
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FIFO operation
76543210
ADC
10-BIT
×8
FIFO
SDO
Serial
FIFO Full
FIFO 3/4 Full
FIFO 1/2 Full
FIFO 1/4 Full
FIFO Threshold Pointer
Figure 15. TLV1504/TLV1508 FIFO
The device has an 8-layer FIFO that can be programmed for different thresholds. An interrupt is sent to the host
after the preprogrammed threshold is reached. The FIFO can be used to store data from either a fixed channel
or a series of channels based on a preprogrammed sweep sequence. For example, an application may require
eight measurements from channel 3. In this case, the FIFO is filled with eight data sequentially taken from
channel 3. Another application may require data from channel 0, channel 2, channel 4, and channel 6 in an
orderly manner. Therefore, the threshold is set for 1/2 and the sweep sequence 02460246 is chosen.
An interrupt is sent to the host as soon as all four data are in the FIFO.
In single shot mode, the FIFO automatically uses a 1/8 FIFO depth. Therefore the CFR bits (D1,0) controlling
FIFO depth are don’t care.
SCLK and conversion speed
There are two ways to adjust the conversion speed.
D The SCLK can be used as the source of the conversion clock to get the highest throughput of the device.
The minimum onboard OSC is 3.6 MHz and 14 conversion clocks are required to complete a conversion.
(Corresponding 3.86
s conversion time) The devices can operate with an SCLK up to 20 MHz for the
supply voltage range specified. When a more accurate conversion time is desired, the SCLK can be used as
the source of the conversion clock. The clock divider provides speed options appropriate for an application
where a high speed SCLK is used for faster I/O. The total conversion time is 14
× (DIV/fSCLK) where DIV is 1,
2, or 4. For example a 20 MHz SCLK with the divide by 4 option produces a {14
× (4/20 M)} = 2.8 s
conversion time. When an external serial clock (SCLK) is used as the source of the conversion clock, the
maximum equivalent conversion clock (fSCLK/DIV) should not exceed 6 MHz.
D Autopower down can be used to slow down the device at a reduced power consumption level. This mode
is always used by the converter. If the device is not accessed (by CS or CSTART), the converter is powered
down to save power. The built-in reference is left on in order to quickly resume operation within one half
SCLK period. This provides unlimited choices to trade speed with power savings.
reference voltage
The device has a built-in reference with a programmable level of 2 V or 4 V. If the internal reference is used,
REFP is set to 2 V or 4 V and REFM should be connected to the analog ground of the converter. An external
reference can also be used through two reference input pins, REFP and REFM, if the reference source is
programmed as external. The voltage levels applied to these pins establish the upper and lower limits of the
analog inputs to produce a full-scale and zero-scale reading respectively. The values of REFP, REFM, and the
analog input should not exceed the positive supply or be lower than GND consistent with the specified absolute
maximum ratings. The digital output is at full scale when the input signal is equal to or higher than REFP and
at zero when the input signal is equal to or lower than REFM.
相關PDF資料 |
PDF描述 |
|---|---|
| TLV1508IDWG4 | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLV1504IDG4 | 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| TLV1504ID | 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
| TLV1508IDWR | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLV1504IPWG4 | 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLV1508 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 10-BIT, 200 KSPS, 4/8 CHANNEL, LOW POWER, SERIAL ANALOG-TO-DIGITAL CONVERTERS WITH AUTO POWER DOWN |
| TLV1508IDW | 功能描述:模數(shù)轉換器 - ADC 10bit 200KSPS SAR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1508IDWG4 | 功能描述:模數(shù)轉換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1508IDWR | 功能描述:模數(shù)轉換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1508IDWRG4 | 功能描述:模數(shù)轉換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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