參數(shù)資料
型號(hào)： TLV1508IDWRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： ADC
英文描述： 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝： GREEN, PLASTIC, SOIC-20
文件頁(yè)數(shù)： 14/43頁(yè)
文件大?。?/td> 985K
代理商： TLV1508IDWRG4
TLV1504, TLV1508
2.7V TO 5.5V, 10BIT, 200KSPS, 4/8CHANNEL, LOW POWER
SERIAL ANALOGTODIGITAL CONVERTERS WITH AUTOPOWERDOWN
SLAS251A DECEMBER 1999 REVISED JANUARY 2003
21
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (continued)
MIN
NOM
MAX
UNIT
Delay time, delay from FS falling edge to SDO valid, td(FSL-DOV) (See Figure 16)
25
ns
Delay time, delay from SCLK falling edge (FS is
VCC = 4.5 V
SDO = 5 pF
0.5 SCLK
+ 9
Delay time, delay from SCLK falling edge (FS is
active) or SCLK rising edge (FS=1) to SDO valid,
td(SCLK-DOV). (See Figures 16 and 19)For a date
VCC = 4.5 V
SDO = 25 pF
0.5 SCLK
+ 10
ns
td(SCLK-DOV). (See Figures 16 and 19)For a date
code later than xxx, see the date code information
item (3).
VCC = 2.7 V
SDO = 5 pF
0.5 SCLK
+ 18
ns
item (3).
VCC = 2.7 V
SDO = 25 pF
0.5 SCLK
+ 19
Delay time, delay from 17th SCLK rising edge (FS is active) or the 16th falling edge
(FS=1) to EOC falling edge, td(SCLK-EOCL) (See Figures 16 and 19)
45
ns
Delay time, delay from 16th SCLK falling edge to INT falling edge (FS =1) or from the
17th rising edge SCLK to INT falling edge (when FS active), td(SCLK-INTL)
(See Figures 16 and 19)
Min t(conv)
s
Delay time, delay from CS falling edge or FS rising edge to INT rising edge,
td(CSL-INTH) or td(FSH-INTH) (See Figures 16, 17, 18, and 19)
1
50
ns
Delay time, delay from CS rising edge to CSTART falling edge, td(CSH-CSTARTL) (See
Figures 17 and 18)
100
ns
Delay time, delay from CSTART rising edge to EOC falling edge, td(CSTARTH-EOCL)
(See Figures 17 and 18)
1
50
ns
Pulse duration, CSTART low time, twL(CSTART) (See Figures 17 and 18)
Min t(sample)
s
Delay time, delay from CSTART rising edge to CSTART falling edge,
td(CSTARTH-CSTARTL) (See Figure 18)
Max t(conv)
s
Delay time, delay from CSTART rising edge to INT falling edge, td(CSTARTH-INTL) (See
Figures 17 and 18)
Max t(conv)
s
Operating free-air temperature, TA
TLV1504I/TLV1508I
40
85
°C
相關(guān)PDF資料
PDF描述
TLV1508IDW 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1508IPWR 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1508IPW 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
TLV1504IDR 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
TLV1504IPWR 4-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV1508IPW 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10bit 200KSPS SAR RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV1508IPWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV1508IPWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV1508IPWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 200 kSPS Serial Out RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
TLV1543 制造商:TI 制造商全稱:Texas Instruments 功能描述:3.3V 10 BIT ANALOG TO DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 ANALOG INPUTS
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