參數(shù)資料
型號(hào): TLV1548QDBREP
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝: GREEN, SSOP-20
文件頁(yè)數(shù): 2/35頁(yè)
文件大小: 686K
代理商: TLV1548QDBREP
TLV1548EP
LOW VOLTAGE 10BIT ANALOGTODIGITAL CONVERTER
WITH SERIAL CONTROL AND 8 ANALOG INPUTS
SGLS171A JUNE 2003 REVISED DECEMBER 2003
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
tACQ
Aa
Ab
Ac
Ad
XDa
Db
Dc
CS
CSTART
DATA IN
EOC
DATA OUT
Async Flag
Read Out
Cycle
Read Out
Cycle
Read Out
Cycle
FS
(DSP Mode)
Complete Extended
Sample Cycle
tACQ
NOTES: A. Aa = Address for input channel a.
B. Da = Conversion result from channel a.
HiZ
Normal
Cycle
Normal
Cycle
Extended
Sample
Cycle
Extended
Sample
Cycle
Figure 2. Extended Sampling Operation
reference voltage inputs
There are two reference inputs used with the TLV1548, REF+ and REF. These voltage values establish the
upper and lower limits of the analog inputs to produce a full-scale and zero-scale reading respectively. The
values of REF+, REF, and the analog input should not exceed the positive supply or be lower than GND
consistent with the specified absolute maximum ratings. The digital output is at full scale when the input signal
is equal to or higher than REF+ and is at zero when the input signal is equal to or lower than REF.
programmable conversion rate
The TLV1548 offers two conversion rates to maximize battery life when high-speed operation is not necessary.
The conversion rate is programmable. Once the conversion rate has been selected, it takes effect immediately
in the same cycle and stays at the same rate until the other rate is chosen. The conversion rate should be set
at power up. Activation and deactivation of the power-down state (digital logic active) has no effect on the preset
conversion rate.
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