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參數(shù)資料
| 型號： | TLV1570IPWR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, TSSOP-20 |
| 文件頁數(shù)： | 31/32頁 |
| 文件大?。?/td> | 634K |
| 代理商： | TLV1570IPWR |
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TLV1570
2.7 V TO 5.5 V 8-CHANNEL 10-BIT 1.25-MSPS
SERIAL ANALOG-TO-DIGITAL CONVERTER
SLAS169B – DECEMBER 1997– REVISED OCTOBER 2000
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
initialization-software sequence (continued)
The TLV1570 interfaces to a DSP over five lines: CS, SCLK, SDOUT, SDIN, and FS, and interfaces to a
C over
four lines: CS, SCLK, SDOUT, and SDIN. The FS input should be pulled high in
C mode. The device is in 3-state
and power-down mode when CS is high. After CS falls, the TLV1570 checks the FS input at the CS falling edge
to determine the operation mode. If FS is low, DSP mode is set, otherwise
C mode is set.
CS
SCLK
FS
SDIN
SDOUT
XF
CLKX
CLKR
FSX
FSR
DX
DR
TLV1570
TMS320
CS
SCLK
FS
SDIN
SDOUT
I/O Terminal
SCLK
DX
DR
TLV1570
C
DVDD
Figure 3. DSP to TLV1570 Interface
Figure 4.
C to TLV1570 Interface
grounding and decoupling considerations
General practices should apply to the PCB design to limit high frequency transients and noise that are fed back
into the supply and reference lines (see Figure 5). This requires that the supply and reference pins be sufficiently
bypassed. In most cases 0.1
F ceramic chip capacitors are adequate to keep the impedance low over a wide
frequency range. Since their effectiveness depends largely on the proximity to the individual supply pin. They
should be placed as close to the supply pins as possible.
To reduce high frequency and noise coupling, it is highly recommended that digital and analog ground be
shorted immediately outside the package. This can be accomplished by running a low impedance line between
DGND and AGND, under the package.
AVDD
AGND
REF
TLV1570
100 nF
DVDD
DGND
100 nF
Figure 5. Placement of Decoupling Capacitors
power supply ground layout
Printed-circuit boards that use separate analog and digital ground planes offer the best system performance.
Wire-wrap boards do not perform well and should not be used. The two ground planes should be connected
together at the low-impedance power-supply source. The best ground connection may be achieved by
connecting the ADC AGND terminal to the system analog ground plane making sure that analog ground
currents are well managed.
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| TLV1571IPWLE | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV1571IDWRG4 | 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV1570IPWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 1.25 MSPS 8-Ch DSP RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1571 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-/8-CHANNEL, 10-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTERS |
| TLV1571_00 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-/8-CHANNEL, 10-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTERS |
| TLV1571CDW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10bit 1.2 MSPS PA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV1571CDWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 1-Ch 10-Bit 1.25MSPS 8-Ch DSP/SPI RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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