參數(shù)資料
型號: TLV1572CDR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO8
封裝: GREEN, PLASTIC, SOIC-8
文件頁數(shù): 8/15頁
文件大?。?/td> 348K
代理商: TLV1572CDR
TLV1572
2.7 V TO 5.5 V, 10-BIT, 1.25 MSPS
SERIAL ANALOG-TO-DIGITAL CONVERTER WITH AUTO-POWERDOWN
SLAS171A – DECEMBER 1997– REVISED SEPTEMBER 1998
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
AIN
SCLK
FS
CS
DO
10-BIT
SAR ADC
CONTROL LOGIC
VCC
GND
VREF
GND
VREF
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AIN
4
I
Analog input
CS/Powerdown
1
I
Chip Select. A low on this input enables the TLV1572. A high disables the device and disconnects the power
to the TLV1572.
DO
8
O
Serial data output. A/D conversion results are provided at this output pin.
FS
7
I
Frame sync input in DSP mode. The falling edge of the frame sync pulse from DSP indicates the start of
a serial data frame shifted out of the TLV1572. The FS input is tied to VCC when interfacing to a
micro-controller.
GND
3
Ground
SCLK
5
I
Serial clock input. This clock synchronizes the serial data transfer and is also used for internal data
conversion.
VCC
6
Power supply, recommend connection to analog supply
VREF
2
I
Reference voltage input. The voltage applied to this pin defines the input span of the TLV1572.
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