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參數(shù)資料
| 型號： | TLV2354IPWRG4 |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 3/19頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DIFF COMPARATOR QUAD 14-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | LinCMOS™ |
| 類型： | 差分 |
| 元件數(shù)： | 4 |
| 輸出類型： | CMOS，MOS，開路漏極，TTL |
| 電壓 - 電源，單路/雙路(±)： | 2 V ~ 8 V |
| 電壓 - 輸入偏移（最小值）： | 5mV @ 5V |
| 電流 - 輸入偏壓（最小值）： | 5pA @ 5V |
| 電流 - 輸出（標(biāo)準(zhǔn)）： | 20mA |
| 電流 - 靜態(tài)（最大值）： | 800µA |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-TSSOP（0.173"，4.40mm 寬） |
| 安裝類型： | 表面貼裝 |
| 包裝： | 帶卷 (TR) |
TLV2354, TLV2354Y
LinCMOS
QUADRUPLE LOW-VOLTAGE DIFFERENTIAL COMPARATORS
SLCS012C – MAY 1992 – REVISED AUGUST 2000
11
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
The digital output stage of the TLV2354 can be damaged if it is held in the linear region of the transfer curve.
Conventional operational amplifier/comparator testing incorporates the use of a servo loop that is designed to force
the device output to a level within this linear region. Since the servo-loop method of testing cannot be used, the
following alternatives for measuring parameters such as input offset voltage, common-mode rejection, etc., are
offered.
To verify that the input offset voltage falls within the limits specified, the limit value is applied to the input as shown
in Figure 9(a). With the noninverting input positive with respect to the inverting input, the output should be high. With
the input polarity reversed, the output should be low.
A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages can
be slewed as shown in Figure 9(b) for the VICR test rather than changing the input voltages to provide greater
accuracy.
+
–
5 V
Applied VIO
Limit
VO
+
–
1 V
Applied VIO
Limit
VO
– 4 V
(a) VIO WITH VIC = 0
(b) VIO WITH VIC = 4 V
5.1 k
5.1 k
Figure 9. Method for Verifying That Input Offset Voltage Is Within Specified Limits
A close approximation of the input offset voltage can be obtained by using a binary search method to vary the
differential input voltage while monitoring the output state. When the applied input voltage differential is equal but
opposite in polarity to the input offset voltage, the output changes states.
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