參數(shù)資料
型號: TLV2556IDWR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
封裝: GREEN, PLASTIC, SOIC-20
文件頁數(shù): 35/37頁
文件大?。?/td> 729K
代理商: TLV2556IDWR
TLV2556
SLAS355A – DECEMBER 2001 – REVISED SEPTEMBER 2002
7
www.ti.com
operating characteristics over recommended operating free-air temperature range, VREF+ = 5 V,
SCLK frequency = 15 MHz when VCC = 5 V, VREF+ =2.5 V, SCLK frequency = 10 MHz when VCC = 2.7 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INL
Integral nonlinearity error (see Note 3)
–1
1
LSB
DNL
Differential nonlinearity error
–1
1
LSB
EO
Offset error (see Note 4)
See Note 2
–2
2
mV
EG
Gain error (see Note 4)
See Note 2
–3
3
mV
ET
Total unadjusted error (see Note 5)
±1.5
LSB
Address data input = 1011
2048
Self-test output code (see Table 2 and Note 6)
Address data input = 1100
0
Self test out ut code (see Table 2 and Note 6)
Address data input = 1101
4095
All typical values are at TA = 25°C.
NOTES:
2. Analog input voltages greater than the voltage applied to REF+ convert as all ones (111111111111), while input voltages less than
the voltage applied to REF– convert as all zeros (000000000000).
3. Linearity error is the maximum deviation from the best straight line through the A/D transfer characteristics.
4. Gain error is the difference between the actual midstep value and the nominal midstep value in the transfer diagram at the specified
gain point after the offset error has been adjusted to zero. Offset error is the difference between the actual midstep value and the
nominal midstep value at the offset point.
5. Total unadjusted error comprises linearity, zero-scale, and full-scale errors.
6. Both the input address and the output codes are expressed in positive logic.
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TLV2556IPWR 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20
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