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參數(shù)資料
| 型號(hào)： | TLV2556IDWRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | GREEN, PLASTIC, SOIC-20 |
| 文件頁數(shù)： | 14/37頁 |
| 文件大?。?/td> | 729K |
| 代理商： | TLV2556IDWRG4 |
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TLV2556
SLAS355A – DECEMBER 2001 – REVISED SEPTEMBER 2002
21
www.ti.com
PARAMETER MEASUREMENT INFORMATION
VOH
VOL
VOH
VOL
VIL
VIH
Last
Clock
tconv
td4
tt3
I/O CLOCK
EOC
INT
VOH
VOL
VOH
VOL
tt3
VOH
VOL
MSB
Valid
EOC
INT
DATA
OUT
Figure 41. I/O CLOCK and EOC Voltage
Waveforms
Figure 42. EOC and DATA OUT Voltage
Waveforms
td6
td7
Figure 43. CS and EOC Voltage Waveforms
Figure 44. I/O CLOCK and EOC Voltage
Waveforms
th5
th6
th7
td9
VIL
VOL
VOH
CS
EOC
INT
VOH
VOL
VOH
VIL
I/O CLOCK
EOC
INT
timing information
DATA OUT
1
2
3
5
4
610
11
12
1
I/O CLOCK
Hi–Z State
DATA IN
8
7
9
D7
16
D3
D2
D1
D0
Configure CFGR1
1st Conversion Cycle
CS
First Cycle After Power-Up: Configure CFGR2
Access Cycle
Data Cycle
Invalid Conversion Data
Command 1111
CFGR2 Data
NOTE A: To minimize errors caused by noise at CS, the internal circuitry waits for a setup time after the CS falling edge before responding to
control input signals. Therefore, no attempt should be made to clock in an address until the minimum CS setup time has elapsed.
Figure 45. Timing for CFGR2 Configuration
The host must configure CFGR2 before valid device conversions can begin. This can be accessed through
command 1111. This can be done using eight, twelve, or sixteen I/O CLOCK clocks. (A minimum of eight is
required to fully program CFGR2.)
After CFGR2 is configured, the following cycle configures CFGR1 and a valid sample/conversion is performed.
CS can be held low for each remaining cycle. First valid conversion output data is available on the third cycle
after power up.
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| TLV2556IPW | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
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| TLV2556IPWR | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
| TLV2556IDW | 11-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO20 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TLV2556IPW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2556IPW | 制造商:Texas Instruments 功能描述:12BIT ADC 200KSPS 2556 TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20 制造商:Texas Instruments 功能描述:12BIT ADC, 200KSPS, 2556, TSSOP20; Resolution (Bits):12bit; Sampling Rate:200kSPS; Supply Voltage Type:Single; Supply Voltage Min:2.7V; Supply Voltage Max:5.5V; Supply Current:3mA; Digital IC Case Style:TSSOP; No. of Pins:20; Input ;RoHS Compliant: Yes |
| TLV2556IPWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2556IPWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV2556IPWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 200 KSPS 11 Ch Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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