參數(shù)資料
型號(hào)： TLV2632IPE4
廠商： TEXAS INSTRUMENTS INC
元件分類： 運(yùn)算放大器
英文描述： DUAL OP-AMP, 4500 uV OFFSET-MAX, 9 MHz BAND WIDTH, PDIP8
封裝： PLASTIC, DIP-8
文件頁(yè)數(shù)： 21/25頁(yè)
文件大?。?/td> 862K
代理商： TLV2632IPE4
TLV2630, TLV2631
TLV2632, TLV2633
TLV2634, TLV2635
SLOS362A JUNE 2001 REVISED JANUARY 2005
5
www.ti.com
electrical characteristics at specified free-air temperature, VDD = 2.7 V, 5 V (unless otherwise noted)
(continued)
dynamic performance
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
GBWP
Gain-bandwidth product
RL = 2 k, CL = 10 pF, f = 10 kHz
9
MHz
SR+
Positive slew rate at unity gain
RL = 2 k CL = 50 pF
VDD = 2.7 V,
VO(PP) = 1.7 V
6
V/ s
SR+
Positive slew rate at unity gain
RL = 2 k, CL = 50 pF
VDD = 5 V,
VO(PP) = 3.5 V
6
V/
s
SR
Negative slew rate at unity gain
RL = 2 k CL = 50 pF
VDD = 2.7 V,
VO(PP) = 1.7 V
25
°C
10
V/
s
SR
Negative slew rate at unity gain
RL = 2 k, CL = 50 pF
VDD = 5 V,
VO(PP) = 3.5 V
9.5
V/
s
φm
Phase margin
RL = 2 k,
CL = 10 pF
50
°
Gain margin
RL = 2 k,
CL = 10 pF
20
dB
Full range is 40°C to 125°C for the I-suffix.
noise/distortion performance
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
VO(PP) = VDD/2,
AV = 1
0.003%
THD + N
Total harmonic distortion plus noise
VO(PP) = VDD/2,
RL = 2 k, f = 10 kHz
AV = 10
0.02%
THD + N
Total harmonic distortion plus noise
RL = 2 k, f = 10 kHz
AV = 100
25
°C
0.095%
Vn
Equivalent input noise voltage
f = 1 kHz
25
°C
50
nV/
√Hz
Vn
Equivalent input noise voltage
f = 10 kHz
30
nV/
√Hz
In
Equivalent input noise current
f = 1 kHz
0.9
fA /
√Hz
shutdown characteristics
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
UNIT
IDD(SHDN)
Supply current, per channel in shutdown
SHDN = 0.4 V
25
°C
4
17
A
IDD(SHDN)
Supply current, per channel in shutdown
mode (TLV2630, TLV2633, TLV2635)
SHDN = 0.4 V
Full range
19
A
t(on)
Amplifier turnon time
RL = 2 k
VDD = 2.7 V
4.5
s
t(on)
Amplifier turnon time
RL = 2 k,
CL = 10 pF
VDD = 5 V
25
°C
1.5
s
t(off)
Amplifier turnoff time
CL = 10 pF
25 C
200
ns
Full range is 40°C to 125°C for the I-suffix.
Disable time and enable time are defined as the interval between application of the logic signal to SHDN and the point at which the supply current
has reached half its final value.
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