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參數(shù)資料
| 型號： | TLV320AIC14C |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO30 |
| 封裝： | PLASTIC, TSSOP-30 |
| 文件頁數(shù)： | 46/54頁 |
| 文件大?。?/td> | 450K |
| 代理商： | TLV320AIC14C |
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5–13
BIAS
0.1
F
0.1
F
0.1
F
MICIN
INP1
INM1
INP2
INM2
0.1
F
Microphone
0.1
F
1
F
OUTP1
1
F
OUTM1
600
600
AVDD
0.1
F
AVSS
3.3 V Analog Supply
Analog GND
0.1
F
3.3 V Analog Supply
Analog GND
DRVDD
DRVSS
IOVDD
1 k
1 k
IOVDD
M/S
FSD
FS
DIN
DOUT
SCLK
From DSP or
Other Clock Source
From DSP
MCLK
RESET
PWRDN
SDA
IOVDD
1 k
From DSP
SCL
0.01
F
0.1
F
1
F
0.01
F
0.1
F
1
F
DVDD
DVSS
IOVDD
IOVSS
To 1.8 V Digital Supply
To Digital GND
To 3.3 V Digital Supply
To Digital GND
TLV320AIC14
FSK
FSR
DX
DR
CLKR
CLKX
TLV320C5X
Figure 5–20. Pseudo-Differential Microphone Input (External Common Mode)
5.12 Layout and Grounding Guidelines for TLV320AIC14
TLV320AIC14 has a built-in analog antialias filter, which provides rejection to external noise at high frequencies that
may couple into the device. Digital filters with high out-of-band attenuation also reject the external noise. If the
differential inputs are used for the ADC channel, then the noise in the common-mode signal is also rejected by the
high CMRR of TLV320AIC14. Using external common-mode for microphone inputs also helps reject the external
noise. However to extract the best performance from TLV320AIC14, care must be taken in board design and layout
to avoid coupling of external noise into the device.
TLV320AIC14 supports clock frequencies as high as 100 MHz. To avoid coupling of fast switching digital signals to
analog signals, the digital and analog sections should be separated on the board. In TLV320AIC14 the digital and
analog pins are kept separated to aid such a board layout. A separate analog ground plane should be used for the
analog section of the board. The analog and digital ground planes should be shorted at only one place as close to
TLV320AIC14 as possible. No digital trace should run under TLV320AIC14 to avoid coupling of external digital noise
into the device. It is suggested to have the analog ground plane running below the TLV320AIC14. The power supplies
should be decoupled close to the supply pins, preferably, with 0.1
F ceramic capacitor and 10 F tantalum capacitor
following it. The ground pin should be connected to the ground plane as close as possible to the TLV320AIC14, so
as to minimize any inductance in the path. Since the MCLK is expected to be a very high frequency signal, it is
advisable to shield it with digital ground. For best performance of ADC in differential input mode, the differential signals
should be routed close to each other in similar fashion, so that the noise coupling on both the signals is same and
can be rejected by the device.
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