參數(shù)資料
型號(hào): TLV320AIC29IRGZ
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, GREEN, PLASTIC, QFN-48
文件頁數(shù): 4/87頁
文件大小: 1049K
代理商: TLV320AIC29IRGZ
TLV320AIC29
SLAS494B DECEMBER 2005 REVISED OCTOBER 2007
www.ti.com
12
AUDIO INTERFACE TIMING DIAGRAMS
ts(DI)
th(DI)
td(DOBCLK)
td(DOWS)
WCLK
BCLK
SDOUT
SDIN
td(WS)
Figure 1. DSP Timing in Master Mode
Typical Timing Requirements (see Figure 1)
PARAMETER(1)
IOVDD = 1.1 V
IOVDD = 3.3 V
UNITS
PARAMETER(1)
MIN
MAX
MIN
MAX
UNITS
td(WS)
WCLK delay
30
15
ns
td(DOWS)
WCLK to DOUT delay (for LJF mode)
30
15
ns
td(DOBCLK) BCLK to DOUT delay
30
15
ns
ts(DI)
SDIN setup
6
ns
th(DI)
SDIN hold
6
ns
tr
Rise time
18
6
ns
tf
Fall time
18
6
ns
(1) These parameters are based on characterization and are not tested in production.
ts(DI)
th(DI)
td(DOBCLK)
WCLK
BCLK
SDOUT
SDIN
td(WS)
Figure 2. DSP Timing in Master Mode
Typical Timing Requirements (see Figure 2)
PARAMETER(1)
IOVDD = 1.1 V
IOVDD = 3.3 V
UNITS
PARAMETER(1)
MIN
MAX
MIN
MAX
UNITS
td(WS)
WCLK delay
30
15
ns
td(DOBCLK)
BCLK to DOUT delay
30
15
ns
ts(DI)
SDIN setup
6
ns
th(DI)
SDIN hold
6
ns
tr
Rise time
18
6
ns
tf
Fall time
18
6
ns
(1) These parameters are based on characterization and are not tested in production.
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