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參數(shù)資料
| 型號(hào)： | TLV320DAC23IGQE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 32-BIT DAC, PBGA80 |
| 封裝： | PLASTIC, MICRO, BGA-80 |
| 文件頁(yè)數(shù)： | 4/39頁(yè) |
| 文件大?。?/td> | 664K |
| 代理商： | TLV320DAC23IGQE |
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23
2.3.3
Stereo Headphone Output
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
0-dB full-scale output voltage
1.0
VRMS
Maximum output power, PO
RL = 32
30
mW
RL = 16
40
mW
Signal-to-noise ratio, A-weighted (see Note 4)
AVDD = 3.3 V
90
97
dB
Total harmonic distortion
AVDD = 3.3 V,
1 kHz output, into
PO = 10 mW
60
dB
Total harmonic distortion
DD
1 kHz output, into
32
PO = 20 mW
40
dB
Power supply rejection ratio
1 kHz, 100 mVpp
50
dB
Programmable gain
1 kHz output
73
6
dB
Programmable-gain step size
1
dB
Mute attenuation
1 kHz output
80
dB
NOTES:
3. Ratio of output level with 1-kHz full-scale input, to the output level with the input short circuited, measured A-weighted over a 20-Hz
to 20-kHz bandwidth using an audio analyzer.
4. All performance measurements done with 20-kHz low-pass filter and, where noted, A-weighted filter. Failure to use such a filter
results in higher THD + N and lower SNR and dynamic range readings than shown in the electrical characteristics. The low-pass
filter removes out-of-band noise, which, although not audible, may affect dynamic specification values.
5. Ratio of output level with 1-kHz full-scale input, to the output level with all zeros into the digital input, measured A-weighted over
a 20-Hz to 20-kHz bandwidth.
2.3.4
Analog Reference Levels
PARAMETER
MIN
TYP
MAX
UNIT
Reference voltage, VMID
AVDD/2 50 mV
AVDD/2 + 50 mV
V
Divider resistance, RVMID
40
50
60
k
2.3.5
Digital I/O
PARAMETER
MIN
TYP
MAX
UNIT
VIL
Input low level
0.3
× BVDD
V
VIH
Input high level
0.7
× BVDD
V
VOL
Output low level
0.1
× BVDD
V
VOH
Output high level
0.9
× BVDD
V
2.3.6
Supply Current
PARAMETER
MIN
TYP
MAX
UNIT
Line playback only (Clk power off, 50
)
6
8
Total supply current, no input signal
Line playback only (Clk power on, 50
)
15
ITOT
Total supply current, no input signal
(3.3 V supply)
Analog bypass (line in to line out)
3
mA
ITOT
(3.3 V supply)
Power down
Oscillator enabled
1.5
mA
Power down
Oscillator disabled
0.01
0.025
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