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參數(shù)資料
| 型號： | TLV5580IPW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28 |
| 封裝： | GREEN, PLASTIC, TSSOP-28 |
| 文件頁數(shù)： | 10/36頁 |
| 文件大小： | 478K |
| 代理商： | TLV5580IPW |
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TLV5580
8BIT, 80 MSPS LOW POWER A/D CONVERTER
SLAS205B DECEMBER 1998 REVISED OCTOBER 2003
www.ti.com
18
TLV5580 EVALUATION MODULE
TI provides an evaluation module (EVM) for TLV5580. The EVM also includes a 10-bit 80 MSPS DAC so that
the user can convert the digitized signal back to the analog domain for functional testing. Performance
measurements can be done by capturing the ADC’s output data.
The EVM provides the following additional features:
D Provision of footprint for the connection of an onboard crystal oscillator, instead of using an external clock input.
D Use of TLV5580 internal or external voltage references. In the case of external references, an onboard circuit
is used that derives adjustable bottom and top reference voltages from a bandgap reference. Two potentiometers
allow for the independent adjustments of both references. The full scale ADC range can be adjusted to the input
signal amplitude.
D All digital output, control signal I/O (output enable, standby, reference power-down) and clock I/O are provided
on a single connector. The EVM can thus be part of a larger (DSP) system for prototyping.
D Onboard prototyping area with analog and digital supply and ground connections.
Figure 15 shows the EVM schematic.
The EVM is factory shipped for use in the following configuration:
D Use of external (onboard) voltage references
D External clock input
ANALOG INPUT
A signal in the range between V(REFBI) and V(REFTI) should be applied to avoid overflow/underflow on connector
J10. This signal is onboard terminated with 50
. There is no onboard biasing of the signal. When using external
(onboard) references, these levels can be adjusted with R7 (V(REFTI)) and R6 (V(REFBI)). Adjusting R7 causes
both references to shift. R6 only impacts the bottom reference. The range of these signals for which the device
is specified depends on AVDD and is shown under the Recommended Operating Conditions.
Internally generated reference levels are also dependent on AVDD as shown in the electrical characteristics
section.
CLOCK INPUT
A clock signal should be applied with amplitudes ranging from 0 to AVDD with a frequency equal to the desired
sampling frequency on connector J9. This signal is onboard terminated with 50
. Both ADC and DAC run off
the same clock signal. Alternatively the clock can be applied from terminal 1 on connector J11. A third option
is using a crystal oscillator. The EVM board provides the footprint for a crystal oscillator that can be populated
by the end-user, depending on the desired frequency. The footprint is compatible with the Epson EG-8002DC
series of programmable high-frequency crystal oscillators. Refer to the TLV5580 EVM Settings for selecting
between the different clock modes.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLV5580IPWG4 | 功能描述:模數(shù)轉換器 - ADC 8B 80MSPS ADC Sgl Ch Hi Ch BW Lo Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5580IPWR | 功能描述:模數(shù)轉換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5580IPWRG4 | 功能描述:模數(shù)轉換器 - ADC 8Bit 80MSPS 1-Ch High Ch Band Lo-Pwr RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| TLV5580PW | 制造商:TI 制造商全稱:Texas Instruments 功能描述:8-BIT, 80 MSPS LOW-POWER A/D CONVERTER |
| TLV5590 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2-BIT ANALOG-TO-DIGITAL CONVERTER FOR FLEX |
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