TLV5604
2.7-V TO 5.5-V 10-BIT 3-
S QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS176B – DECEMBER 1997 – REVISED JULY 2002
18
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
APPLICATION INFORMATION
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
; Interrupt Service Routines
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
int1
ret
; do nothing and return
int23
ret
; do nothing and return
timer_isr:
in
iosr_stat, IOSR ; store IOSR value into variable space
lacl
iosr_stat
; load acc with iosr status
and
#0FFFDh
; reset IO1 – LDAC low
sacl
temp
;
out
temp, IOSR ;
or
#0002h
; set IO1 – LDAC high
sacl
temp
;
out
temp, IOSR
;
and
#0FFFEh
; reset IO0 – CS low
sacl
temp
;
out
temp, IOSR
;
lacl
r_ptr
; load rolling pointer to accumulator
add
#sinevals
; add pointer to table start
sacl
DACa_ptr
; to get a pointer for next DAC a sample
add
#08h
; add 8 to get to DAC C pointer
sacl
DACc_ptr
add
#08h
; add 8 to get to DAC B pointer
sacl
DACb_ptr
add
#08h
; add 8 to get to DAC D pointer
sacl
DACd_ptr
mar
*,ar0
; set ar0 as current AR
; DAC A
lar
ar0, DACa_ptr ; ar0 points to DAC a sample
lacl
*
; get DAC a sample into accumulator
or
#DACa_control ; OR in DAC A control bits
sacl
temp
;
out
temp, SDTR
; send data
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
; We must wait for transmission to complete before writing next word to the SDTR.
; TLV5604 interface does not allow the use of burst mode with the full packet rate, as
; we need a CLKX –ve edge to clock in last bit before FS goes high again, to allow SPI
; compatibility.
;–––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
rpt
#016h
; wait long enough for this configuration
nop
; of MCLK/CLKOUT1 rate
; DAC B
lar
ar0, DACb_ptr ; ar0 points to DAC a sample
lacl
*
; get DAC a sample into accumulator
or
#DACb_control ; OR in DAC B control bits
sacl
temp
;
out
temp, SDTR
; send data
rpt
#016h
; wait long enough for this configuration
nop
; of MCLK/CLKOUT1 rate