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參數(shù)資料
| 型號： | TLV5604IDG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 8.5 us SETTLING TIME, 10-BIT DAC, PDSO16 |
| 封裝： | GREEN, PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 26/31頁 |
| 文件大?。?/td> | 572K |
| 代理商： | TLV5604IDG4 |
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TLV5604
2.7-V TO 5.5-V 10-BIT 3-
S QUADRUPLE DIGITAL-TO-ANALOG CONVERTERS
WITH POWER DOWN
SLAS176B – DECEMBER 1997 – REVISED JULY 2002
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage AVDD DVDD
5-V supply
4.5
5
5.5
V
Supply voltage, AVDD, DVDD
3-V supply
2.7
3
3.3
V
High level digital input voltage VIH
DVDD = 2.7 V
2
V
High-level digital input voltage, VIH
DVDD = 5.5 V
2.4
V
Low level digital input voltage VIL
DVDD = 2.7 V
0.6
V
Low-level digital input voltage, VIL
DVDD = 5.5 V
1
V
Reference voltage V f to REFINAB REFINCD terminal
5-V supply (see Note 1)
0
2.048
AVDD–1.5
V
Reference voltage, Vref to REFINAB, REFINCD terminal
3-V supply (see Note 1)
0
1.024
AVDD–1.5
V
Load resistance, RL
2
10
k
Load capacitance, CL
100
pF
Serial clock rate, SCLK
20
MHz
Operating free air temperature
TLV5604C
0
70
°C
Operating free-air temperature
TLV5604I
–40
85
°C
NOTE 1: Voltages greater than AVDD/2 will cause output saturation for large DAC codes.
electrical characteristics over recommended operating free-air temperature range
(unless otherwise noted)
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
10
bits
Integral nonlinearity (INL), end point adjusted
See Note 2
±1
LSB
Differential nonlinearity (DNL)
See Note 3
±0.1
±1
LSB
EZS
Zero scale error (offset error at zero scale)
See Note 4
±12
mV
Zero scale error temperature coefficient
See Note 5
10
ppm/
°C
EG
Gain error
See Note 6
±0.6 %of FS
voltage
Gain error temperature coefficient
See Note 7
10
ppm/
°C
PSRR
Power supply rejection ratio
Zero scale gain
See Notes 8 and 9
– 80
dB
PSRR
Power supply rejection ratio
Gain
See Notes 8 and 9
– 80
dB
NOTES:
2. The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors.
3. The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal
1 LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code.
4. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.
5. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) – EZS (Tmin)]/Vref × 106/(Tmax – Tmin).
6. Gain error is the deviation from the ideal output (2Vref – 1 LSB) with an output load of 10 k excluding the effects of the zero-error.
7. Gain temperature coefficient is given by: EG TC = [EG(Tmax) – EG (Tmin)]/Vref × 106/(Tmax – Tmin).
8. Zero-scale-error rejection ratio (EZS–RR) is measured by varying the AVDD from 5 ±0.5 V and 3 ±0.3 V dc, and measuring the
proportion of this signal imposed on the zero-code output voltage.
9. Gain-error rejection ratio (EG-RR) is measured by varying the AVDD from 5 ±0.5 V and 3 ±0.3 V dc and measuring the proportion
of this signal imposed on the full-scale output voltage after subtracting the zero scale change.
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