參數(shù)資料
型號: TLV5610IYE
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PBGA20
封裝: WAFER CHIP SCALE, 20 PIN
文件頁數(shù): 1/17頁
文件大?。?/td> 345K
代理商: TLV5610IYE
TLV5610IYE
TLV5608IYE
SLAS393 OCTOBER 2003
2.7 V TO 5.5 V, 12 AND 10BIT OCTAL DAC
IN WAFER CHIP SCALE PACKAGE
FEATURES
D Eight Voltage Output DACs in One Package
TLV5610IYE ... 12-Bit
TLV5608IYE ... 10-Bit
D Programmable Settling Time vs Power
Consumption
1
s in Fast Mode
3
s in Slow Mode
D Compatible With TMS320 DSP Family and
SPI Serial Ports
D Monotonic Over Temperature
D Low Power Consumption:
18 mW in Slow Mode at 3 V
48 mW in Fast Mode at 3 V
D Power Down Mode
D Buffered, High Impedance Reference Inputs
D Data Output for Daisy Chainin
APPLICATIONS
D Digital Servo Control Loops
D Digital Offset and Gain Adjustment
D Industrial Process Control
D Machine and Motion Control Devices
D Mass Storage Devices
(BOTTOM VIEW)
WCS PACKAGE
SCLK
DVDD
PRE
FS
DGND
DOUT
AVDD
OUTB
OUTD
OUTC
OUTA
AGND
19
20
1
2
34
5
6
12
11
10
9
13
14
15
16
78
17
18
DIN
OUTE
OUTF
OUTG
OUTH
REF
LDAC
MODE
DESCRIPTION
The TLV5610IYE and TLV5608IYE are pin compatible eight channel 12-/10-bit voltage output DACs each with a flexible
serial interface. The serial interface allows glueless interface to TMS320 and SPI, QSPI, and Microwire serial ports. It is
programmed with a 16-bit serial string containing 4 control and 12 data bits.
Additional features are a power-down mode, an LDAC input for simultaneous update of all eight DAC outputs, and a data
output which can be used to cascade multiple devices.
The resistor string output voltage is buffered by a rail-to-rail output amplifier with a programmable settling time to allow the
designer to optimize speed vs power dissipation. The buffered, high-impedance reference input can be connected to the
supply voltage.
The TLV5610IYE and TLV5608IYE implemented with a CMOS process and are available in a 20-terminal WCS package.
The TLV5610IYE and TLV5608IYE are characterized for operation from 40
°C to 85°C in a wire-bonded small outline
(SOIC) package.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
www.ti.com
Copyright
2003, Texas Instruments Incorporated
TMS320 DSP is a trademark of Texas Instruments.
相關(guān)PDF資料
PDF描述
TLV5608IYER SERIAL INPUT LOADING, 3 us SETTLING TIME, 10-BIT DAC, PBGA20
TLV5610IYER SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PBGA20
TLV5610IYZT SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, BGA20
TLV5610IYZR SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, BGA20
TLV5610IYZ SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, BGA20
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