參數(shù)資料
型號(hào)： TLV5613IDW
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： DAC
英文描述： PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝： PLASTIC, SO-20
文件頁(yè)數(shù)： 12/23頁(yè)
文件大?。?/td> 447K
代理商： TLV5613IDW
TLV5613
2.7 V TO 5.5 V 12-BIT PARALLEL DIGITAL-TO-ANALOG CONVERTER
WITH POWER DOWN
SLAS174B – DECEMBER 1997 – REVISED NOVEMBER 2000
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Interface
Control
4-Bit
DAC MSW
Holding
Latch
A(0–1)
CS
WE
OUT
Power-On
Reset
x2
4
3-Bit
Control
Latch
3
Powerdown
and Speed
Control
2
12-Bit
DAC
Latch
12
REF
LDAC
2
8-Bit
DAC LSW
Holding
Latch
8
4
D(0–7)
PWD
SPD
8
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AVDD
11
Analog positive power supply
A0
8
I
Address input
A1
7
I
Address input
CS
18
I
Chip select. Digital input active low, used to enable/disable inputs
DVDD
10
Digital positive power supply
D0 (LSB) – D7 (MSB)
1–6, 19, 20
I
Data input
LDAC
16
I
Load DAC. Digital input active low, used to load DAC output
OUT
13
O
DAC analog voltage output
PWD
15
I
Power down. Digital input active low
REF
12
I
Analog reference voltage input
SPD
9
I
Speed select. Digital input
GND
14
Ground
WE
17
I
Write enable. Digital input active low, used to latch data
相關(guān)PDF資料
PDF描述
TLV5613IDWR PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613IPWR PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5613IDWRG4 PARALLEL, WORD INPUT LOADING, 1 us SETTLING TIME, 12-BIT DAC, PDSO20
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