參數(shù)資料
型號(hào)： TLV5618
廠商： Texas Instruments, Inc.
英文描述： 2.7-V to 5.5-V Low-Power Dual 12-Bit Digital-to-Analog Converter with Power Down(2.7-5.5V低功耗雙12位，帶掉電D/A轉(zhuǎn)換器)
中文描述： 2.7 V至5.5 V低功耗雙12位數(shù)字到模擬轉(zhuǎn)換器斷電（2.7 - 5.5V的低功耗雙12位，帶掉電的D / A轉(zhuǎn)換器）
文件頁(yè)數(shù)： 5/18頁(yè)
文件大?。?/td> 275K
代理商： TLV5618
TLV5618A
2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT
DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
SLAS230G
–
JULY 1999
–
REVISED AUGUST 2001
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
(continued)
reference input
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VI
RI
CI
Input voltage range
0
VDD
–
1.5
V
Input resistance
10
M
pF
MHz
Input capacitance
5
Reference input bandwidth
REF = 0 2 V
REF = 0.2 Vpp + 1.024 V dc
+ 1 024 V dc
Fast
1.3
Slow
525
kHz
Reference feedthrough
REF = 1 Vpp at 1 kHz + 1.024 V dc (see Note 10)
–
80
dB
NOTE 10: Reference feedthrough is measured at the DAC output with an input code = 0x000.
digital inputs
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
μ
A
μ
A
pF
IIH
IIL
Ci
High-level digital input current
VI = VDD
VI = 0 V
1
Low-level digital input current
–
1
Input capacitance
8
analog output dynamic performance
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ts(FS)
Output settling time full scale
Output settling time, full scale
RL = 10 k
,
CL = 100 pF, See Note 11
100 pF See Note 11
Fast
1
3
Slow
3
10
μ
s
ts(CC)
Output settling time code to code
Output settling time, code to code
RL = 10 k
,
CL = 100 pF, See Note 12
100 pF See Note 12
Fast
1
Slow
2
μ
s
SR
Slew rate
RL = 10 k
,
CL = 100 pF, See Note 13
100 pF See Note 13
Fast
3
V/ s
Slow
0.5
Glitch energy
DIN = 0 to 1,
FCLK = 100 kHz, CS = VDD
5
nV
–
s
SNR
Signal-to-noise ratio
76
SINAD
Signal-to-noise + distortion
fs = 102 kSPS, fout = 1 kHz, RL = 10 k
,
CL = 100 pF
68
dB
THD
Total harmonic distortion
–
68
SFDR
NOTES: 11. Settling time is the time for the output signal to remain within
±
0.5 LSB of the final measured value for a digital input code change
of 0x020 to 0xFDF and 0xFDF to 0x020 respectively. Not tested, assured by design.
12. Settling time is the time for the output signal to remain within
±
0.5 LSB of the final measured value for a digital input code change
of one count. Not tested, assured by design.
13. Slew rate determines the time it takes for a change of the DAC output from 10% to 90% of full-scale voltage.
Spurious free dynamic range
72
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TLV5618A 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
TLV5618A_06 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN
TLV5618ACD 功能描述:數(shù)模轉(zhuǎn)換器- DAC Dual 12bit DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5618ACDG4 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2.5 us Dual DAC Serial Input RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
TLV5618ACDR 功能描述:數(shù)模轉(zhuǎn)換器- DAC 12-Bit 2.5 us Dual DAC Serial Input RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
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