參數(shù)資料
型號(hào)： TLV5626CDG4
廠(chǎng)商： TEXAS INSTRUMENTS INC
元件分類(lèi)： DAC
英文描述： SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
封裝： PLASTIC, SOIC-8
文件頁(yè)數(shù)： 13/19頁(yè)
文件大?。?/td> 424K
代理商： TLV5626CDG4
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (VDD to AGND)
7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Reference input voltage range
– 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital input voltage range
– 0.3 V to VDD + 0.3 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA: TLV5626C
0
°C to 70°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLV5626I
– 40
°C to 85°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
260
°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
MIN
NOM
MAX
UNIT
Supply voltage VDD
VDD = 5 V
4.5
5
5.5
V
Supply voltage, VDD
VDD = 3 V
2.7
3
3.3
V
Power on threshold voltage, POR
0.55
2
V
High-level digital input voltage, VIH
VDD = 2.7 V to 5.5 V
2
V
Low-level digital input voltage, VIL
VDD = 2.7 V to 5.5 V
0.8
V
Reference voltage, Vref to REF terminal
VDD = 5 V (see Note 1)
AGND
2.048
VDD –1.5
V
Reference voltage, Vref to REF terminal
VDD = 3 V (see Note 1)
AGND
1.024
VDD – 1.5
V
Load resistance, RL
2
k
Load capacitance, CL
100
pF
Clock frequency, fCLK
20
MHz
Operating free air temperature TA
TLV5626C
0
70
°C
Operating free-air temperature, TA
TLV5626I
–40
85
°C
NOTE 1: Due to the x2 output buffer, a reference input voltage
≥ (VDD – 0.4 V)/2 causes clipping of the transfer function. The output buffer of the
internal reference must be disabled, if an external reference is used.
相關(guān)PDF資料
PDF描述
TLV5626IDG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
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