參數(shù)資料
型號(hào): TLV5626ID
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): DAC
英文描述: SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
封裝: PLASTIC, SOIC-8
文件頁(yè)數(shù): 7/19頁(yè)
文件大?。?/td> 424K
代理商: TLV5626ID
TLV5626
2.7-V TO 5.5-V LOW-POWER DUAL 8-BIT DIGITAL-TO-ANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS236A –JUNE 1999 – REVISED JUNE 2000
15
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
4040047 / D 10/96
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0
°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
相關(guān)PDF資料
PDF描述
TLV5626IDR SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
TLV5626IDRG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
TLV5626CDG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
TLV5626IDG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
TLV5626CDRG4 SERIAL INPUT LOADING, 2.8 us SETTLING TIME, 8-BIT DAC, PDSO8
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