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參數(shù)資料
| 型號： | TLV5639IDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| 封裝： | GREEN, PLASTIC, SOIC-20 |
| 文件頁數(shù)： | 4/23頁 |
| 文件大小： | 477K |
| 代理商： | TLV5639IDW |
www.ti.com
The following table lists the meaning of the bits within the control register:
LINEARITY, OFFSET, AND GAIN ERROR USING SINGLE END SUPPLIES
DAC Code
Output
Voltage
0 V
Negative
Offset
TLV5639C
TLV5639I
SLAS189C – MARCH 1999 – REVISED JANUARY 2004
APPLICATION INFORMATION (continued)
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
REF1
REF0
X
PWR
SPD
X(1)
0(1)
X(1)
0(1)
(1)
Default values
SPD
: Speed control bit
1 = fast mode
0 = slow mode
PWR
: Power control bit
1 = power down
0 = normal operation
REF1 and REF0 determine the reference source and the reference voltage.
REFERENCE BITS
REF1
REF0
REFERENCE
0
External
0
1
1.024 V
1
0
2.048 V
1
External
If an external reference voltage is applied to the REF pin, external reference must be selected.
When an amplifier is operated from a single supply, the voltage offset can still be either positive or negative. With
a positive offset, the output voltage changes on the first code change. With a negative offset the output voltage
may not change with the first code depending on the magnitude of the offset voltage.
The output amplifier attempts to drive the output to a negative voltage. However, because the most negative
supply rail is ground, the output cannot drive below ground and clamps the output at 0 V.
The output voltage remains at zero until the input code value produces a sufficient positive output voltage to
overcome the negative offset voltage, resulting in the transfer function shown in Figure 12.
Figure 12. Effect of Negative Offset (Single Supply)
This offset error, not the linearity error, produces this breakpoint. The transfer function would have followed the
dotted line if the output buffer could drive below the ground rail.
For a DAC, linearity is measured between zero input code (all inputs 0) and full scale code (all inputs 1) after
offset and full scale are adjusted out or accounted for in some way. However, single supply operation does not
allow for adjustment when the offset is negative due to the breakpoint in the transfer function. So the linearity is
measured between full scale code and the lowest code that produces a positive output voltage.
12
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| TLV5639IDWG4 | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
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| TLV5639IDWRG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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| TLV5639IPWG4 | 功能描述:數(shù)模轉(zhuǎn)換器- DAC Low Power 12-Bit DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube |
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