參數(shù)資料
型號: TLV5639IDWR
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
封裝: GREEN, PLASTIC, SOIC-20
文件頁數(shù): 19/23頁
文件大?。?/td> 477K
代理商: TLV5639IDWR
www.ti.com
ELECTRICAL CHARACTERISTICS
TLV5639C
TLV5639I
SLAS189C – MARCH 1999 – REVISED JANUARY 2004
over operating free-air temperature range (unless otherwise noted)
REFERENCE PIN CONFIGURED AS OUTPUT (REF)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Vref(OUTL)
Low reference voltage
1.003
1.024
1.045
V
Vref(OUTH)
High reference voltage
VDD > 4.75 V
2.027
2.048
2.069
V
Iref(source)
Output source current
1
mA
Iref(sink)
Output sink current
1
mA
PSRR
Power supply rejection ratio
48
dB
REFERENCE PIN CONFIGURED AS INPUT (REF)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VI
Input voltage
0
VDD- 1.5
V
RI
Input resistance
10
M
CI
Input capacitance
5
pF
Fast
900
Reference input bandwidth
REF = 0.2 Vpp + 1.024 V dc
kHz
Slow
500
Fast
87
10 kHz
dB
Slow
77
Harmonic distortion, reference
REF = 1 Vpp + 2.048 V dc,
Fast
74
input
VDD = 5 V
50 kHz
dB
Slow
61
100 kHz
Fast
66
dB
Reference feedthrough
REF = 1 Vpp at 1 kHz + 1.024 V dc, See
(1)
80
dB
(1)
Reference feedthrough is measured at the DAC output with an input code = 0x000.
DIGITAL INPUTS
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IIH
High-level digital input current
VI = VDD
1
A
IIL
Low-level digital input current
VI = 0 V
1
A
Ci
Input capacitance
8
pF
5
相關(guān)PDF資料
PDF描述
TLV5639IDW PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639IDWG4 PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639CPWR PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639CDW PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
TLV5639IPWR PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20
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