- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98262 > TLV5639QDW (TEXAS INSTRUMENTS INC) PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 PDF資料下載
參數(shù)資料
| 型號： | TLV5639QDW |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| 封裝： | PLASTIC, SOIC-20 |
| 文件頁數(shù)： | 17/22頁 |
| 文件大小： | 445K |
| 代理商： | TLV5639QDW |
www.ti.com
ELECTRICAL CHARACTERISTICS
TLV5639C
TLV5639I
SLAS189C – MARCH 1999 – REVISED JANUARY 2004
over operating free-air temperature range (unless otherwise noted)
POWER SUPPLY
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Fast
2.3
2.8
mA
REF
on
Slow
1.3
1.6
mA
VDD= 5 V
Fast
1.9
2.4
mA
REF
No load,
off
Slow
0.9
1.2
mA
IDD
Power supply current
All inputs = AGND or VDD,
Fast
2.1
2.6
mA
REF
DAC latch = 0x800
on
Slow
1.2
1.5
mA
VDD = 3 V
Fast
1.8
2.3
mA
REF
off
Slow
0.9
1.1
mA
Power down supply current
0.01
1
A
Zero scale, External reference(1)
60
PSRR
Power supply rejection ratio
dB
Full scale, External reference(2)
60
(1)
Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) - EZS(VDDmin))/VDDmax]
(2)
Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) - EG(VDDmin))/VDDmax]
STATIC DAC SPECIFICATIONS
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
12
bits
INL
Integral nonlinearity, end point adjusted
RL = 10 k, CL = 100 pF, See note
(1)
±1.2
±3
LSB
DNL
Differential nonlinearity
RL = 10 k, CL = 100 pF, See note
(2)
±0.3
±0.5
LSB
EZS
Zero-scale error (offset error at zero scale)
See note (3)
±12
LSB
EZSTC Zero-scale-error temperature coefficient
See note (4)
20
ppm/
°C
% full
EG
Gain error
See note (5)
±0.3
scale V
EGTC
Gain error temperature coefficient
See note (6)
20
ppm/
°C
(1)
The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output from
the line between zero and full scale excluding the effects of zero code and full-scale errors (see text).
(2)
The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal 1 LSB
amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains constant)
as a change in the digital input code.
(3)
Zero-scale error is the deviation from zero voltage output when the digital input code is zero (see text).
(4)
Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) - EZS (Tmin)]/2Vref× 10
6/(T
max - Tmin).
(5)
Gain error is the deviation from the ideal output (2Vref - 1 LSB) with an output load of 10 k excluding the effects of the zero-error.
(6)
Gain temperature coefficient is given by: EG TC = [EG(Tmax) - EG (Tmin)]/2Vref× 10
6/(T
max - Tmin).
OUTPUT SPECIFICATIONS
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO
Output voltage
RL = 10 k
VDD-0.4
V
% full
Output load regulation accuracy
VO= 4.096 V, 2.048 V,
RL = 2 k
±0.29
scale V
4
相關PDF資料 |
PDF描述 |
|---|---|
| TLV5639QDWR | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| TLV5639QDWREP | PARALLEL, WORD INPUT LOADING, 3.5 us SETTLING TIME, 12-BIT DAC, PDSO20 |
| TLV571IDWRG4 | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV571IDWR | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
| TLV571IPWR | 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLV5639QDWR | 制造商:Texas Instruments 功能描述:DAC 1CH RES-STRING 12-BIT 20SOIC - Tape and Reel |
| TLV571 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER |
| TLV571_06 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER |
| TLV571_07 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.7 V TO 5.5 V, 1-CHANNEL, 8-BIT, PARALLEL ANALOG-TO-DIGITAL CONVERTER |
| TLV571CDW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復。