參數(shù)資料
型號(hào): TLV571IDWR
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): ADC
英文描述: 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
封裝: GREEN, PLASTIC, SOIC-24
文件頁(yè)數(shù): 28/28頁(yè)
文件大小: 479K
代理商: TLV571IDWR
TL
V571
2.7
V
T
O
5.5
V
,1-CHANNEL,
8-BIT
P
ARALLEL
ANALOG-T
O-DIGIT
AL
CONVERTER
SLAS239A
SEPTEMBER
1999
REVISED
FEBRUAR
Y
2000
POST
OFFICE
BOX
655303
DALLAS,
TEXAS
75265
9
internal clock
With CS low and WR low, data is written into the ADC. The sampling begins at the falling edge of CSTART, and conversion begins at the rising
edge of CSTART. The internal clock turns on at the rising edge of CSTART. The internal clock is disabled after each conversion.
OR
Auto Powerdown
CS
WR
CSTART
INTCLK
RD
D[0:7]
INT
EOC
Config
Data
ADC
Data
ADC
Data
t
su(CSL_WRL)
th(WRH_CSH)
td(CSH_CSTARTL)
t(sample)
tsu(DAV_WRH)
t
h(WRH_DAV)
tc
tsu(CSL_RDL)
th(RDH_CSH)
ten(RDL_DAV)
tdis(RDH_DAV)
tc
tsu(CSL_RDL)
ten(RDL_DAV)
t
(STARTOSC)
t(STARTOSC)
9
10
1
0
Auto Powerdown
Figure 5. Input Conversion – Hardware CSTART, Internal Clock
相關(guān)PDF資料
PDF描述
TLV571IPWR 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
TLV571IDWG4 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
TLV571IDW 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
TLV571IPWG4 1-CH 8-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDSO24
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