參數(shù)資料
型號(hào)： TMC2072
廠商： Fairchild Semiconductor Corporation
英文描述： Genlocking Video Digitizer
中文描述： 同步鎖相視頻數(shù)字化儀
文件頁(yè)數(shù)： 18/21頁(yè)
文件大?。?/td> 160K
代理商： TMC2072
TMC2072
PRODUCT SPECIFICATION
18
REV. 1.0.4 6/19/01
Application Notes
The TMC2072 is a complex mixed-signal VLSI circuit. It
produces CMOS digital signals at clock rates of up to 15
MHz while processing analog video inputs with a resolution
of less than a few millivolts. To maximize performance it is
important to provide an electrically quiet operating environ-
ment. The circuit shown in Figure 16 provides an optional
external 1.2V reference to the V
REF
input of the TMC2072.
The internal V
REF
source is adequate for most applications.
Flltering
Inexpensive low-pass anti-aliasing filters are shown in
Figures 17 and 18. These filters would normally be inserted
in the video signal path just before the 75
terminating
resistor and AC-coupling capacitor for each of the three
video inputs, V
IN1-3
. The filter of Figure 17 exhibits a
5th-order Chebyshev response with-3dB bandwidth of
6.7MHz and a group delay of 140 nanoseconds at 5MHz.
The filter of Figure 18 has been equalized for group delay in
the video signal band. Its -3dB passband is 5.5MHz while
the group delay is constant at 220 nanoseconds through the
DC to 5MHz frequency band.
Figure 17. Simple Anti-aliasing Filter
Figure 18. Group Delay Equalizer Filter
Using a 20 MHz Crystal
In systems where a 20 MHz clock is not available, a crystal
may be used to generate the clock to the TMC2072. The
crystal must be a 20 MHz “fundamental” type, not overtone.
Specific crystal characteristics are listed in Table 4 and the
connections are shown in Figure 19.
Table 4. Crystal Parameters
Figure 19. Direct Crystal Connections
Grounding
The TMC2072 has separate analog and digital circuits. To
minimize digital crosstalk into the analog signals, the power
supplies and ground connections are provided over separate
pins (V
DD
and V
DDA
are digital and analog power supply
pins; D
GND
and A
GND
are digital and analog ground pins).
In general, the best results are obtained by tying all grounds
to a solid, low-impedance ground plane. Power supply pins
should be individually decoupled at the pin. Power supply
noise isolation should be provided between analog and digi-
tal supplies via a ferrite bead inductor on the analog lead.
Ultimately all +5 Volt power to the TMC2072 should come
from the same power source.
Another approach calls for separating analog and digital
ground. While some systems may benefit from this strategy,
analog and digital grounds must be kept within 0.1V of each
other at all times.
Unused Video Inputs
The TMC2072's three video inputs (VIN1, VIN2, and VIN3)
are high impedance, diode-protected against moderate elec-
trostatic discharge, and DC biased to approximately 1.9V.
We recommend tying any unused inputs to ground or to
VDD through a 1 M
resistor or a capacitor. Unused inputs
may also be left open without damaging the part. If grounded
directly, a video input port will source less than 1mA when
selected.
2.2
μ
H
470 pF
65-2072-17
470 pF
1000 pF
2.2
μ
H
3.3
μ
H
3.3
μ
H
4.7
μ
H
2.2
μ
H
910
μ
H
4.7
μ
H
430 pF
65-2072-18
750 pF
430 pF
470 pF
470 pF
Parameter
Fundamental frequency
Tolerance
Stability
Load Capacitance
Shunt Capacitance
ESR
Value
20 MHz
±
30 ppm @ 25
°
C
±
50 ppm, 0
°
C to 70
°
C
20 pF
7 pF Max.
50
, Max.
33 pF
20 MHz
Crystal
65-2072-19
CLK IN
TMC2072
300
1M
CLK OUT
33 pF
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