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參數(shù)資料
| 型號： | TMC2250AKEC3 |
| 廠商： | RAYTHEON SEMICONDUCTOR |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | JT 37C 37#22D SKT PLUG |
| 中文描述： | 12-BIT, DSP-MULTIPLIER, PQFP120 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大小： | 186K |
| 代理商： | TMC2250AKEC3 |
PRODUCT SPECIFICATION
TMC2250A
14
REV. 1.0.2 10/25/00
4 x 2-Pixel Cascadeable Convolver
(Mode 11)
Similar to Mode 10, the 4 x 2 -Pixel convolver allows the use
to perform full-speed cubic convolution with only two
TMC2250A devices and the TMC2111A Pipeline Delay
Register to synchronize the cascade ports (see the Applica-
tions Discussion section).
Pixel data are side-loaded into ports A and B, multiplied by
the onboard coefficients, summed with the cascade input,
and half-LSB rounded to 16 bits. The four-cycle impulse
response emerges at the cascade output port 5 to 8 clock
cycles later. A new output word is available on every clock
cycle. Note that Multiplier KC2 is not used in this mode and
that its stored coefficient is ignored.
As shown below, the column of input pixel data is automati-
cally shifted one location to the right through the two rows of
multiplier input registers on every clock in anticipation of
two new input data words, effectively sliding the convolu-
tional window over one column in an image plane.
CASOUT(8)=
A(4)KA3(4)+A(3)KA2(3)+A(2)KA1(2)
+A(1)KB3(4)+B(4)KB3(4)+B(3)KB2(3)
+B(2)KB1(2)+B(1)KC1(2)+CASIN(5)
Figure 7. 4 x 2-Pixel Convolver Impulse Response (Mode 11)
CLK
1
01
10
11
00
1.0
11
Q8
Q8
KA2 + KB2
KC1 + KC3
KA3 + KB3
KA1 + KB1
K_1
K_2
K_3
2
3
4
5
6
7
8
9
10
11
CWE
KA, KB, KC
DATA IN A, B
MODE
CASIN
CASOUT
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