參數(shù)資料
型號(hào)： TMDS250PAGRG4
廠商： TEXAS INSTRUMENTS INC
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： GREEN, PLASTIC, TQFP-64
文件頁(yè)數(shù)： 9/27頁(yè)
文件大?。?/td> 709K
代理商： TMDS250PAGRG4
www.ti.com
HPD Pins
DDC Channels
RupSource
VDDSource
Source
Sink
Ron
SCL_SINK
SDA_SINK
SCL
SDA
Driver(Source)
I to-Sink
I to-Source
VDDSink
RupSink
VCCRx
RupRx
Driver(Sink)
Ito
* Sink +
V
dd * Vol(Sink)max
R
upSource RupSink
(1)
lto
* Sink +
V
dd
R
upSource RupSink
(2)
V
ith(Source)min u lto * Sink
Ron ) Vol(Sink)max
(3)
R
upSink w
V
dd
Ron
R
upSource
(V
ith(Source)min * Vol(Sink)max)
R
upSource * Vdd
Ron
(4)
R
upRx w
V
ccRx
Ron
(V
ith(Sink)min * Vol(Source)max)
(5)
SLLS866 – AUGUST 2007
The HPD circuits are powered by the 5-V supply. They provide 5-V TTL output signals to the SOURCE with a
typical 1-k
output resistance. An external 1-k resistor is not needed here. The HPD output of the selected
source port follows the logic level of the HPD_SINK input. Unselected HPD outputs are kept low. When the
device is in standby mode, all HPD outputs follow HPD_SINK. A 1-k
resistor to ground keeps all HPD outputs
low in standby mode if a fixed low state is preferred.
The DDC circuits (SDA, SCL) are powered by a 5-V supply. The I/O pins can connect to the 5-V termination
voltages directly. A 47-k
pull-up resistor to the 5 V is recommended on the SCL1 and SCL2 pins. There is no
pull-up resistor on the SDA pins. The pull-up resistor can be replaced with a different value.
Figure 17. Simplified Electrical Circuit Model for DDC Channel
In Figure 17, when the Driver (Sink) pulls the bus low, the highest voltage level is Vol(Sink)max. The current flow
through the pass-gate resistor can be presented as:
where the Vddsource = Vddsink = Vdd
To simplify the equation, Vol(Sink)max is set equal to 0 V to reach equation (2):
The voltage at the input of the SINK is Ito - Sink
× Ron + V
ol(Sink)max, which should be lower than the minimum
input low threshold voltage of the Driver (Source), Vith(Source)min to keep the bus in correct interoperations.
By combining equations (2) and (3), the minimum pull-up resistor at the Sink input is:
Applying the same methodology to calculate the pull-up resistor at the input of the Driver (Sink), the minimum
pull-up resistor is:
The data sheet VPASS specification ensures the maximum output voltage is clamped at 3.6 V to support a 3.3-V
connection. Resistors pulling up to 3.3 V on SCL_SINK and SDA_SINK ensure the high level does not exceed
the 3.3-V termination voltage.
Copyright 2007, Texas Instruments Incorporated
17
Product Folder Link(s): TMDS250
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