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參數(shù)資料
| 型號： | TMDS461PZIT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大?。?/td> | 1467K |
| 代理商： | TMDS461PZIT |
PRODUCTPREVIEW
EXAMPLE – READING FROM THE TMDS461
TMDS461 Read Phase 1
www.ti.com ................................................................................................................................................................................................. SLLS915 – AUGUST 2008
Where each X logic state is defined by the Local_Addr pin being tied to either VCC or GND.
Step 3
8
I2C Acknowledge (Slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C Write Sink Logic Address
0
Addr
(Master)
Where Addr is determined by the values shown in Table 9.
Step 5
8
I2C Acknowledge (Slave)
A
Step 6
7
6
5
4
3
2
1
0
I2C Write Data (Master)
Data
Where Data is determined by the values shown in Table 2 ?? or Table 3 ??.
Step 7
8
I2C Acknowledge (Slave)
A
Step 8
0
I2C Stop (Master)
P
An example of the proper bit control for selecting port 2 is:
Step 4 : 0000 0001
Step 6 : 0010 0000
The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C master
initiates a write operation to the TMDS461 by generating a start condition (S) followed by the TMDS461 I2C
address, in MSB first bit order, followed by a '0' to indicate a write cycle. After receiving acknowledges from the
TMDS461, the master presents the sub-address of the register it wants to read. After the cycle is acknowledged
(A), the master terminates the cycle immediately by generating a stop condition (P).
The second phase is the data phase. In this phase, an I2C master initiates a read operation to the TMDS461 by
generating a start condition followed by the TMDS461 I2C address (as shown below for a read operation), in
MSB first bit order, followed by a '1' to indicate a read cycle. After an Acknowledge from the TMDS461, the I2C
master receives one byte of data from the TMDS461. After the data byte has been transferred from the
TMDS461 to the master, the master generates a NOT-Acknowledge followed by a stop. Similar to the Write
function, to read both sink ports Steps 1 through 11 must be repeated for each logic address desired.
Step 1
0
I2C Start (Master)
S
Step 2
7
6
5
4
3
2
1
0
I2C General Address (Master)
0
1
0
1
0
X
0
Where each X logic state is defined by the Local_Addr pin being tied to either VCC or GND.
Step 3
8
I2C Acknowledge (Slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C Write Sink Logic Address
0
Addr
(Master)
Copyright 2008, Texas Instruments Incorporated
21
Product Folder Link(s) :TMDS461
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