參數(shù)資料
型號: TMP86PM29BUG
廠商: Toshiba Corporation
英文描述: Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.3 to 5.6; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35
中文描述: 8位微控制器
文件頁數(shù): 153/204頁
文件大?。?/td> 1774K
代理商: TMP86PM29BUG
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TMP86PM29BUG
Figure 12-10 Receive Mode (Example: 8bit, 1word transfer, Internal clock)
12.6.3 8-bit transfer / receive mode
After setting the SIO control register to the 8-bit transmit/receive mode, write the data to be transmitted first
to the data buffer registers (DBR). After that, enable the transmit/receive by setting SIOCR1<SIOS> to “1”.
When transmitting, the data are output from the SO pin at leading edges of the serial clock. When receiving,
the data are input to the SI pin at the trailing edges of the serial clock. When the all receive is enabled, 8-bit
data are transferred from the shift register to the data buffer register. An INTSIO interrupt is generated when
the number of data words specified with the SIOCR2<BUF> has been transferred. Usually, read the receive
data from the buffer register in the interrupt service. The data buffer register is used for both transmitting and
receiving; therefore, always write the data to be transmitted after reading the all received data.
When the internal clock is used, a wait is initiated until the received data are read and the next transfer data
are written. A wait will not be initiated if even one transfer data word has been written.
When an external clock is used, the shift operation is synchronized with the external clock; therefore, it is
necessary to read the received data and write the data to be transmitted next before starting the next shift oper-
ation. When an external clock is used, the transfer speed is determined by the maximum delay between genera-
tion of an interrupt request and the received data are read and the data to be transmitted next are written.
The transmit/receive operation is ended by clearing SIOCR1<SIOS> to “0” or setting SIOCR1<SIOINH> to
“1” in INTSIO interrupt service program.
When SIOCR1<SIOS> is cleared, the current data are transferred to the buffer. After SIOCR1<SIOS>
cleared, the transmitting/receiving is ended at the time that the final bit of the data has been transmitted.
That the transmitting/receiving has ended can be determined from the status of SIOSR<SIOF>.
SIOSR<SIOF> is cleared to “0” when the transmitting/receiving is ended.
When SIOCR1<SIOINH> is set, the transmit/receive operation is immediately ended and SIOSR<SIOF> is
cleared to “0”.
If it is necessary to change the number of words in external clock operation, SIOCR1<SIOS> should be
cleared to “0”, then SIOCR2<BUF> must be rewritten after confirming that SIOSR<SIOF> has been cleared to
“0”.
If it is necessary to change the number of words in internal clock, during automatic-wait operation which
occurs after completion of transmit/receive operation, SIOCR2<BUF> must be rewritten before reading and
writing of the receive/transmit data.
a
1
a
0
a
2
a
3
a
4
a
5
a
6
a
7
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
DBR
b
a
Clear SIOS
Read out
Read out
SCK pin
(Output)
SI pin
INTSIO Interrupt
SIOCR1<SIOS>
SIOSR<SIOF>
SIOSR<SEF>
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TMP86PM49FG Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.7 to 6.0; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V): &#160; ESD (kV) min: -; Package: DO-35
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP86PM29BUG(C) 功能描述:8位微控制器 -MCU 8b MCU w/ LCD Drvr 128 pxls 32B ROM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
TMP86PM29F 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-Bit Microcontroller
TMP86PM29U 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-Bit Microcontroller
TMP86PM29U/F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS 8-Bit Microcontroller
TMP86PM46NG(OA) 制造商:Toshiba America Electronic Components 功能描述: