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參數(shù)資料
| 型號(hào)： | TMP86PS64FG |
| 廠商： | Toshiba Corporation |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 6.9 to 7.2; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| 中文描述： | 8位微控制器 |
| 文件頁(yè)數(shù)： | 164/210頁(yè) |
| 文件大?。?/td> | 1455K |
| 代理商： | TMP86PS64FG |
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Page 154
15. Synchronous Serial Interface (SIO1)
15.6 Transfer Mode
TMP86PS64FG
When an external clock is used, the shift operation is synchronized with the external clock; therefore, it is
necessary to read the received data and write the data to be transmitted next before starting the next shift oper-
ation. When an external clock is used, the transfer speed is determined by the maximum delay between genera-
tion of an interrupt request and the received data are read and the data to be transmitted next are written.
The transmit/receive operation is ended by clearing SIO1CR1<SIOS> to “0” or setting SIO1CR1<SIOINH> to
“1” in INTSIO1 interrupt service program.
When SIO1CR1<SIOS> is cleared, the current data are transferred to the buffer. After SIO1CR1<SIOS>
cleared, the transmitting/receiving is ended at the time that the final bit of the data has been transmitted.
That the transmitting/receiving has ended can be determined from the status of SIO1SR<SIOF>.
SIO1SR<SIOF> is cleared to “0” when the transmitting/receiving is ended.
When SIO1CR1<SIOINH> is set, the transmit/receive operation is immediately ended and SIO1SR<SIOF>
is cleared to “0”.
If it is necessary to change the number of words in external clock operation, SIO1CR1<SIOS> should be
cleared to “0”, then SIO1CR2<BUF> must be rewritten after confirming that SIO1SR<SIOF> has been cleared
to “0”.
If it is necessary to change the number of words in internal clock, during automatic-wait operation which
occurs after completion of transmit/receive operation, SIO1CR2<BUF> must be rewritten before reading and
writing of the receive/transmit data.
Note:The buffer contents are lost when the transfer mode is switched. If it should become necessary to switch the
transfer mode, end receiving by clearing SIO1CR1<SIOS> to “0”, read the last data and then switch the trans-
fer mode.
Figure 15-11 Transfer / Receive Mode (Example: 8bit, 1word transfer, Internal clock)
a
1
a
0
a
2
a
3
a
4
a
5
a
6
a
7
b
0
b
1
b
2
b
3
b
4
b
5
b
6
b
7
c
1
c
0
c
2
c
3
c
4
c
5
c
b
c
6
c
7
d
0
d
1
d
2
d
3
d
4
d
5
d
6
d
7
Clear SIOS
DBR
d
a
Read out (c)
Write (a)
Read out (d)
Write (b)
SCK1 pin
(output)
SO1 pin
INTSIO1 interrupt
SIO1CR1<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
SI1 pin
相關(guān)PDF資料 |
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| TMP87C409BMG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.0 to 7.3; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C409BNG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.2 to 7.6; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C809BMG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 7.3 to 7.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP87C809BNG | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
| TMP87C446N | Low Current Operation at 250 ，Low Reverse Leakage,Low Noise Zener Diode |
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| TMP87C408 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
| TMP87C408DM | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP87C408LM | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
| TMP87C408LN | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:CMOS 8-BIT MICROCONTROLLER |
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