參數(shù)資料
型號: TMP90CM40
廠商: Toshiba Corporation
元件分類: 通用總線功能
英文描述: High Speed Advanced CMOS 8-bit Microcontroller,Integrating 8-Bit CUP,A/D Converter,RAM,ROM,General Serial Interface,Multifuction Timer/Event Counter(高速、先進(jìn)的 CMOS 8位微控制器(芯片集成了8位CPU,A/D,轉(zhuǎn)換器,ROM,RAM,通用串行接口,多功能定時器/事件計數(shù)器))
中文描述: 采用先進(jìn)的CMOS高速8位微控制器,集成8位杯,A / D轉(zhuǎn)換,內(nèi)存,光盤,通用串行接口,Multifuction定時器/事件計數(shù)器(高速,先進(jìn)的的CMOS 8位微控制器(芯片集成了8位處理器,A / D轉(zhuǎn)換,轉(zhuǎn)換器,ROM和RAM內(nèi)存,通用串行接口,多功能定時器/事件計數(shù)器))
文件頁數(shù): 6/12頁
文件大?。?/td> 403K
代理商: TMP90CM40
6/12
TOSHIBA CORPORATION
TMP90CM40
3. Operation
The following explains the TMP90CM40 function and basic
operations. The CPU functions and internal I/O functions of
the TMP90CM40 are the same as the TMP90C840A.
Refer to the “TMP90C840A” section concerning functions
which are not explained in the following.
3.1 CPU
The TMP90CM40 has an internal high-performance 8-bit
CPU.
Refer to the book TLCS 90 Series CPU Core Architec-
ture concerning CPU operation.
3.2 Memory Map
The TMP90CM40 supports a program memory of up to 64K
bytes and a data memory of maximum 1Mbytes.
The program memory may be assigned to the address
space from 00000H to 0FFFFH, while the data memory can
be allocated to any address from 00000H to FFFFFH.
(1)
Internal ROM
The TMP90CM40 internally contains a 32K byte ROM.
The address space from 0000H to 7FFFH is provided to
the ROM. The CPU starts executing a program from
0000H by resetting.
The addresses 0010H to 007FH in this internal ROM
area are used for the entry area for the interrupt processing.
(2)
Internal RAM
The TMP90CM40 also contains a 1K byte RAM, which
is allocated to the address space from FBC0H to
FFBFH. The CPU allows the access to a certain RAM
area (FF00H to FFBFH, 192 bytes) by a short opera-
tion code (opcode) in a “direct addressing mode”.
The addresses FF10H to FF7FH in this internal RAM
area can be used as parameter area for micro DMA
processing (and for any other purpose when the micro
DMA function is not used).
(3)
Internal I/O
The TMP90CM40 provides a 48-byte address space
as an internal I/O area, whose addresses range from
FFC0H to FFEFH. This I/O area can be accessed by
the CPU using a short opcode in the “direct
addressing mode”.
Figure 3.1 (1) is a memory map indicating the areas
accessible by the CPU in the respective addressing
mode.
相關(guān)PDF資料
PDF描述
TMP90P800 A System Evaluation LSI With One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(帶一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90P802 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90PH02 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH44 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH48 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
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