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參數(shù)資料
| 型號： | TMP90PH48 |
| 廠商： | Toshiba Corporation |
| 英文描述： | A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位)) |
| 中文描述： | 一個(gè)系統(tǒng)評價(jià)芯片與8位CPU，一次性可編程（16384 × 8位），內(nèi)存（512 × 8位）（系統(tǒng)評估大規(guī)模集成電路（集成8位的CPU，一次可編程ROM更新（16384 x 8位），內(nèi)存（512 × 8位）） |
| 文件頁數(shù)： | 8/14頁 |
| 文件大?。?/td> | 417K |
| 代理商： | TMP90PH48 |
8/14
TOSHIBA CORPORATION
TMP90PH48
3.2 PROM Mode
(1)
Mode Setting and Function
PROM mode is set by setting the
to the “L” level.
The programming and verification for the internal
RESET
and CLK pins
PROM is achieved by using a general EPROM pro-
grammer with the adapter socket. The device slection
(ROM type) should be “27256” with following conditions.
Size = 256Kbit (32Kx 8bit) TPW = 1ms, VPP = 12.5V)
Figure 3.2 shows the setting of pins in PROM mode
Figure 3.2. PROM Mode Pin Setting
(2)
Programming Flow Chart
The programming mode is set by applying 12.5V (pro-
gramming voltage) to the VPP pin when the following
pins are set as follows,
(Vcc
: 6.0V)
*These conditions can be
(
RESET
: “L” level) obtained by using adaptor
(CLK
: “L” level) socket.
After the address and data have been fixed, a data on
the Data Bus is programmed when the CE pin is set to
“Low” (1ms plus is required).
General programming procedure of an EPROM
programmer is as follows,
Write a data to a specified address for 1ms.
Verify the data. If the read-out data does not match
the expected data, another writing is performed until
the correct data is written (Max. 25 times).
After the correct data is written, an additional writing is
performed by using three times longer programming
pulse width (1ms x programming times), or using three
times more programming pulse number. Then, verify
the data and increment the address.
The verification for all data is done under the condition
of Vpp = Vcc = 5V after all data were written.
Figure 3.3 shows the programming flow chart.
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