參數(shù)資料
型號(hào): TMP96CM40F
廠商: Toshiba Corporation
英文描述: High Speed Advanced CMOS 16-bit Microcontroller With Bulit-in 32K Byte OTP ROM For Controlling Medium to Large-Scale Equipment(用于中等到大型設(shè)備控制,高速、先進(jìn)的 CMOS 16位微控制器,芯片內(nèi)置32K字節(jié)可一次編程ROM)
中文描述: 采用先進(jìn)的CMOS高速16位Bulit微控制器,用于控制中等至大型設(shè)備在32K字節(jié)檢察官辦公室光盤(pán)(用于中等到大型設(shè)備控制,高速,先進(jìn)的的CMOS 16位微控制器,芯片內(nèi)置32K的字節(jié)可一次編程光盤(pán))
文件頁(yè)數(shù): 7/18頁(yè)
文件大?。?/td> 571K
代理商: TMP96CM40F
TOSHIBA CORPORATION
7/18
TMP96CM40F
3.
This section describes in blocks the functions and basic oper-
ations of the TMP96CM40F device.
Check the chapter Guidelines and Restrictions for proper
care of the device.
Operation
3.1 CPU
The TMP96CM40F device has a built-in high-performance 16-
bit CPU. (For CPU operation, see TLCS-900 CPU in the book
Core Architecture User Manual.)
3.2 Memory Map
The TMP96CM40F has two register modes. One is minimum
mode; in this mode, the area of program memory is 64K bytes
maximum. The other is maximum mode; in this mode, the area
of the program memory is 16M bytes maximum.
Both minimum and maximum modes are the data mem-
ory area 16M bytes maximum.
That is, the program memory can locate 0H ~ FFFFFFH
in maximum mode.
(1)
Internal ROM
The TMP96CM40 has the ROM of 32K bytes. This
RAM is located to 80H ~ FFFFH. After the RESET
operation, instruction execution starts from address
8000H. A part of the internal ROM area (8000H ~
81FFH) is interrupt entry area.
(2)
Internal RAM
The TMP96CM40 has the RAM of 1K bytes. This RAM
is located to 80H ~ 47FH. The CPU can access the
part of RAM (80H ~ FFH, 128 bytes) with using the
short instruction code of direct addressing mode.
(3)
Internal /O Devices
The TMP96CM40 uses the address space of 128
bytes for the internal I/O devices area. This area is
located to 0H ~ 7FH.
The CPU can access the internal I/O devices area with
using short instruction code of direct addressing
mode.
Check the access area of each addressing mode and
the memory map in Fig. 3.1.
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