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TMS28F004Axy, TMS28F400Axy
524288 BY 8-BIT/
262
144 BY 16-BIT
AUTO-SELECT BOOT-BLOCK FLASH MEMORIES
SMJS829A – JANUARY 1996 – REVISED AUGUST 1997
72
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
VPP
RP
W
G
E
Write
Read-Array
Command
Read Status-
Register Bits
Automated
Byte/Word
Programming
Write Valid
Address or
Data
Write
Program-Setup
Command
Power Up
and
Standby
Data
FFh
Valid SR
tc(W)
tsu(A)
th(A)
tsu(E)
th(E)
tw(WH)
tc(W)OP
tw(W)
tsu(D)
th(D)
trec(RPHW)
tsu(RP)
th(RP)
th(VPP)
tsu(VPP)1
Hi-Z
Hi-Z
Hi-Z
40h or 10h
DQ0– DQ7
(byte-wide)
DQ0– DQ15
(word-wide)
th(WP)
tsu(WP)
WP
A–1–A17
(byte-wide)
A0–A17
(word-wide)
Figure 12. Write-Cycle Timing (W-Controlled Write)